Low-Leakage Sense Circuit Common Footer Design
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Solution Overview
Problem
Current sense amplifiers in memory circuits, such as SRAM, are leaky, leading to significant leakage contributions to the total memory circuit leakage, especially when a large number of sense amplifiers are used, which can exceed 30% of the total leakage.
Innovation Solution
Incorporating a low-leakage sense circuit design that utilizes a common footer device and a sense signal generation and boost (SSG&B) circuit instead of built-in footer devices within the sense amplifiers, along with an optional common header device, to reduce leakage during pre-charge operation modes without sacrificing performance during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional built-in footer devices are used within each sense amplifier, then the sense amplifier can perform read operations, but the leakage current during pre-charge operations becomes significant
Solution Approach 1:
Multiple individual footer devices within separate sense amplifiers are merged into a single common footer device that serves all sense amplifiers. This consolidation reduces the total number of footer devices from N (where N is the number of sense amplifiers) to just one, thereby dramatically reducing leakage current during pre-charge operations while maintaining the necessary functionality for read operations through shared control mechanisms.
Solution Approach 2:
The common footer device is designed to perform multiple functions: it provides the footer function for all sense amplifiers simultaneously, responds to sense mode control signals for read operations, and can be controlled by sleep mode control signals for leakage reduction. This multi-functional design allows a single device to replace multiple individual footer devices while maintaining system performance.
2Loss of energy
If a common footer device is used for all sense amplifiers, then leakage current is reduced, but the drive current may be insufficient for proper operation
Solution Approach 1:
The common footer device incorporates dynamic control through sense mode control signals that adjust its operating state based on the operational mode. During read operations, the footer device is activated with appropriate drive current. During pre-charge operations, it is deactivated or put in a low-power state to minimize leakage. This dynamic switching capability allows the same device to provide high drive current when needed and low leakage when not needed.
Solution Approach 2:
The electrical parameters of the common footer device (such as gate voltage, channel conductivity) are dynamically changed based on operational requirements. Sense mode control signals modify these parameters to provide sufficient drive current during read operations, while sleep mode control signals adjust parameters to minimize leakage during pre-charge operations. This parameter modulation allows the device to adapt its characteristics to different operational demands.
Data Source
AI summary
A disclosed sense circuit for a memory circuit includes sense amplifiers that detect differences in voltage levels on complementary bitlines during read operations. Instead of the sense amplifiers having built-in footer devices that lead to significant leakage, the sense circuit incorporates a common footer device for all sense amplifiers. To ensure that this footer device has sufficient drive strength to enable voltage differential detection by each sense amplifier, the sense circuit also includes a sense signal generation and boost circuit (SSG&B circuit) that generates a sense mode control signal (SEN) to control the on/off states of the footer device and that further boosts SEN, at the appropriate time, to increase the drive current. By using the common footer device and the SSG&B circuit, leakage from the sense circuit is reduced during a pre-charge operation mode without sacrificing performance during a read operation mode. Also disclosed are associated method embodiments.