Sense Circuit for Negative Threshold Voltage Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices face limitations in expanding negative voltage sensing ranges while minimizing the physical space and circuit complexity required for support circuitry, which is essential for maintaining reliability in sensing operations.
Innovation Solution
A sense circuit design that employs a ramped selected word line potential, coupled with a diode and a BOOST TDC DRIVER circuitry, allows for increased negative sense range without generating negative voltages, enabling effective sensing of memory cells with negative threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If negative voltage charge pumps are used for sensing operations, then sensing capability for negative threshold voltages is achieved, but physical space consumption increases
Solution Approach 1:
The patent extracts and eliminates the negative voltage charge pump from the sensing circuitry. Instead of generating negative voltages through dedicated charge pump circuits, the invention uses a simplified sensing approach that operates with positive voltages only, thereby removing the space-consuming charge pump while maintaining sensing capability for cells with negative threshold voltages
Solution Approach 2:
The patent changes the voltage parameters used in sensing operations. Rather than applying negative voltages to sense memory cells with negative threshold voltages, the invention uses positive voltages in combination with ramped word line potentials and boosted sense nodes to achieve the same sensing effect, fundamentally altering the voltage parameter regime
2Reliability
If negative voltage charge pumps are used for sensing operations, then sensing capability for negative threshold voltages is achieved, but circuit complexity increases
Solution Approach 1:
The patent removes the complex negative voltage charge pump circuitry from the sensing path. The simplified circuit uses only positive voltage rails and standard sensing transistors, eliminating the need for charge pump control logic, negative voltage generation stages, and associated protection circuitry
Solution Approach 2:
Instead of generating negative voltages to sense negative threshold voltage cells, the patent inverts the approach by using positive voltages with ramped word line potentials and boosted sense nodes. This inversion simplifies the circuit topology while achieving the same sensing objective
3Device complexity
If conventional sensing methods are used without negative voltages, then circuit simplicity is maintained, but sensing range for negative threshold voltages is limited
Solution Approach 1:
The patent introduces dynamic voltage control through ramped word line potentials during sensing operations. The word line voltage is ramped from an initial positive level to a final higher positive level, creating a time-varying potential that enables sensing of negative threshold voltage cells while maintaining circuit simplicity and using only positive voltage rails
Solution Approach 2:
The patent applies preliminary boosting to the sense node before the actual sensing operation. By pre-charging the sense node to a boosted positive voltage level, the circuit creates sufficient voltage headroom to detect the effect of negative threshold voltage cells during the subsequent sensing phase, extending the sensing range without adding complexity
Data Source
AI summary
Methods of operating a memory include selectively discharging a data line through a memory cell selected for sensing, discharging a sense node to the data line while a voltage level of the sense node is greater than a voltage level of the data line, and inhibiting discharging of the data line to the sense node while the voltage level of the data line is greater than the voltage level of the sense node. Sense circuits include a path between an input node and a sense node facilitating current flow from the sense node to the input node when a voltage level of the sense node is greater than a voltage level of the input node and inhibiting current flow from the input node to the sense node when the voltage level of the sense node is less than the voltage level of the input node.