Sense and Compare Circuit for Non-Volatile Memory Data Verification
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Solution Overview
Problem
Existing non-volatile memory technologies face challenges in ensuring high accuracy and endurance of memory cells during data programming operations, as existing verification methods are inadequate in preventing incorrect programming.
Innovation Solution
A non-volatile memory apparatus comprising a page buffer, write circuit, and sense and compare circuit that reads and compares data from memory cells and a page buffer to generate rewrite-in data, determining whether to program or inhibit data based on the comparison, thereby ensuring accurate programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If verification for data programming operation is performed, then accuracy of data in memory cells is improved, but device complexity increases due to additional sense and compare circuit
Solution Approach 1:
The patent combines the sense circuit and compare circuit into a single integrated sense and compare circuit. The sense circuit reads data from memory cells while the compare circuit simultaneously compares this read data with expected data from the page buffer, merging two separate verification functions into one unified circuit structure. This reduces overall device complexity while maintaining the accuracy improvements from verification.
Solution Approach 2:
The sense and compare circuit performs multiple functions: it senses data from memory cells, compares the sensed data with expected data from the page buffer, and generates verification results. This multi-functional circuit eliminates the need for separate sense and compare circuits, reducing device complexity while enabling comprehensive data verification for improved accuracy.
2Duration of action of stationary object
If multi-pulse method and multi-level method are used to program memory cells, then endurance of memory cells is improved, but data accuracy deteriorates due to programming errors
Solution Approach 1:
The patent implements a feedback verification mechanism where the sense and compare circuit reads data back from memory cells after programming and compares it with the expected data stored in the page buffer. If discrepancies are detected, the system can identify programming errors and inhibit re-programming of correctly programmed cells. This feedback loop ensures data accuracy while allowing the use of multi-pulse and multi-level methods for improved endurance.
Solution Approach 2:
The verification process is performed immediately after programming as a preliminary check before considering the programming operation complete. The sense and compare circuit reads and verifies data right after it is programmed, allowing early detection and correction of programming errors before they propagate, thus maintaining data accuracy despite using aggressive programming methods.
3Productivity
If verification action is performed to enhance cycling of memory cells, then productivity is improved by inhibiting verified pass cells, but device complexity increases
Solution Approach 1:
The sense circuit and compare circuit are merged into a single sense and compare circuit that performs both data reading and verification functions. This integration reduces the overall circuit complexity while enabling the productivity improvements from verification-based cycling enhancement, where correctly programmed cells are inhibited from re-programming.
Data Source
AI summary
A non-volatile memory apparatus and a data verification method thereof are provided. The non-volatile memory apparatus includes a plurality of memory cells, a page buffer, a write circuit, a sense amplifier, and a sense and compare circuit. The page buffer stores a plurality of buffered data and programs the plurality of memory cells according to the plurality of buffered data. The write circuit receives a program data or a rewrite-in data and writes the program data or the rewrite-in data to the page buffer. The sense amplifier senses data read from the memory cells for generating a read-out data. The sense and compare circuit reads the buffered data, and compares the read-out data and a compared buffered data to generate a rewrite-in data. The sense and compare circuit determines the rewrite-in data to be the buffered data or an inhibiting data according to the compared result.