Sense IGBT Current Detection with N+ Region
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Solution Overview
Problem
Trench gate IGBTs, particularly sense IGBTs, face challenges in reducing on-voltage due to difficulties in storing positive holes in the p-type region, leading to ineffective current detection in low current regions, which hampers the ability to detect main IGBT currents.
Innovation Solution
Incorporating an n+-type semiconductor region over the upper surface of a p-type well adjacent to trench gate electrodes in the sense IGBT cell, enhancing conductivity modulation by accumulating positive holes and improving current detection capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a sense IGBT is used for current detection, then current detection capability is improved, but on-voltage is not lowered due to difficulty in storing positive holes in the p-type region
Solution Approach 1:
The patent applies local quality by creating a p-type region with different properties in the sense IGBT compared to the main IGBT. Specifically, the sense IGBT has a p-type region with higher impurity concentration and different doping characteristics, which enables effective positive hole storage locally in the detection element without affecting the overall device performance. This localized modification allows the sense IGBT to achieve both low on-voltage and accurate current detection.
Solution Approach 2:
The patent employs parameter changes by modifying the impurity concentration and doping profile of the p-type region in the sense IGBT. By adjusting these parameters, the sense IGBT achieves optimal positive hole storage capability while maintaining low on-voltage characteristics. The specific parameter modifications include increasing the impurity concentration in the p-type region and optimizing the doping depth to enable effective conductivity modulation.
2Loss of energy
If positive holes are accumulated in the p-type region to promote conductivity modulation, then on-voltage is reduced, but this is difficult to achieve in the outermost peripheral sense IGBT
Solution Approach 1:
The patent addresses the peripheral sense IGBT issue by implementing local quality modifications specifically in the p-type region of these devices. The p-type region in peripheral sense IGBTs is designed with enhanced impurity concentration and optimized geometric characteristics that enable effective positive hole accumulation despite their location at the chip periphery. This localized enhancement ensures that conductivity modulation occurs reliably in all sense IGBTs regardless of their position.
Solution Approach 2:
The patent applies beforehand cushioning by pre-designing the p-type region with sufficient impurity concentration and appropriate dimensions before operation. This pre-engineered structure ensures that even in peripheral sense IGBTs where positive hole storage is naturally difficult, the p-type region has already been prepared with the necessary characteristics to accumulate positive holes effectively during device operation, thereby preventing operation failures in low current regions.
3Area of stationary object
If the sense IGBT is arranged at the outermost periphery for compact design, then device area is reduced, but positive hole storage becomes difficult
Solution Approach 1:
The patent resolves the peripheral arrangement issue by applying local quality principles to the p-type region design. The p-type region in peripheral sense IGBTs is specifically engineered with higher impurity concentration and optimized dimensions to compensate for the location-induced difficulties in positive hole storage. This localized enhancement allows the sense IGBT to maintain reliable operation despite being positioned at the chip periphery for compact design.
Solution Approach 2:
The patent employs parameter changes by modifying the impurity concentration, doping depth, and geometric dimensions of the p-type region in peripheral sense IGBTs. These parameter adjustments are specifically tailored to enable effective positive hole storage in the constrained peripheral location, thereby maintaining both compact device area and reliable hole storage capability simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces on-voltage and enhances current detection performance, allowing for accurate detection of main IGBT currents even in low current regions, thereby improving the overall performance of the semiconductor device.
Implementation Method 1
positive holes are accumulated in a p-type region of a floating state adjacent to a trench gate electrode to thereby promote conductivity modulation, thus reducing an on voltage
Implementation Method 2
it is not possible to detect a current of a main IGBT by using the sense IGBT
Data Source
AI summary
To improve current detection performance of a sense IGBT particularly in a low current region in a semiconductor device equipped with a main IGBT and the sense IGBT used for current detection of the main IGBT.At a peripheral portion located at an outermost periphery of an active region surrounded by a dummy region within a sense IGBT cell, an n+-type semiconductor region is formed over an upper surface of a well of a floating state adjacent to a trench gate electrode embedded into a trench at an upper surface of a semiconductor substrate and applied with a gate voltage.