Sense Transistor Source Conductor Layout for Current Ratio Accuracy
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Solution Overview
Problem
The existing transistor arrangements face challenges in precisely measuring load current due to parasitic effects, which cause deviations in the current ratio between the sense and load transistors, especially when the sense transistor is designed to be small to minimize losses.
Innovation Solution
A transistor arrangement is designed with a drift and drain region in a semiconductor body, featuring load and sense transistor cells connected via source conductors with specific resistances, where the area specific resistance of the sense transistor's source conductor is greater than that of the load transistor's, to improve current measurement accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the size of the sense transistor is reduced to minimize measurement losses, then energy loss is reduced, but measurement precision deteriorates due to increased deviation in the current ratio from the size ratio caused by parasitic effects
Solution Approach 1:
The patent applies local quality by differentiating the source conductor design between the sense transistor and load transistor. The sense transistor is equipped with a first source conductor having a first area-specific resistance, while the load transistor has a second source conductor with a second area-specific resistance. This localized differentiation compensates for parasitic effects in the sense transistor region, maintaining current ratio accuracy even when the sense transistor size is reduced to minimize measurement losses.
Solution Approach 2:
The patent changes the electrical resistance parameter of the source conductors to compensate for parasitic effects. By setting the area-specific resistance of the sense transistor's source conductor differently from that of the load transistor's source conductor, the patent adjusts the electrical characteristics to maintain an accurate current ratio. This parameter change allows the sense transistor to be sized optimally for minimal losses while preserving measurement precision.
2Loss of energy
If the sense transistor is made smaller to reduce measurement losses, then energy efficiency improves, but device complexity increases due to the need for differentiated source conductor designs with specific resistance ratios
Solution Approach 1:
The patent implements local quality by applying different area-specific resistance characteristics to specific regions (sense transistor source conductor vs. load transistor source conductor). This localized approach allows the sense transistor to be minimized for energy efficiency while the differentiated source conductor design compensates for parasitic effects, avoiding the need for more complex global redesigns of the entire transistor structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables precise measurement of load current while minimizing measurement-related losses, with a high proportionality factor between sense and load currents, reducing the dependency on the operating point.
Implementation Method 1
a first source conductor having a first area specific resistance, and a second source conductor having a second area specific resistance, wherein the area specific resistance of the second source conductor is greater than the area specific resistance of the first source conductor
Data Source
AI summary
A transistor arrangement includes a drift and drain region arranged in a semiconductor body and each connected to a drain node, a plurality of load transistor cells each comprising a source region integrated in a first region of the semiconductor body, a plurality of sense transistor cells each comprising a source region integrated in a second region of the semiconductor body, a first source node electrically connected to the source region of each of the plurality of the load transistor cells via a first source conductor, and a second source node electrically connected to the source region of each of the plurality of the sense transistor cells via a second source conductor, a resistance of the second source conductor is different from a resistance of the first source conductor, and the second source conductor comprises an elongated span with a plurality of meanders in which the connection line reverses its direction.