Sense Transistor Protection via Floating Terminals
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Solution Overview
Problem
Conventional sense transistors in floating gate memory devices are exposed to high programming and erase voltages, leading to damage, charge leakage, and reduced data integrity due to the disturbance of stored charge during read operations.
Innovation Solution
A sense amplifier configuration with additional isolation/coupling transistors (Q1A, Q1B, Q2A, Q2B) is used to protect sense transistors by floating their source and drain during programming and erasing cycles, reducing the stress on the gate oxide and parasitic capacitance, thereby minimizing damage and maintaining data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high input impedance sense amplifier is used to directly sense the voltage on the floating gate, then measurement precision is improved, but the sense transistor is exposed to large programming and erase voltages causing damage and charge leakage
Solution Approach 1:
The patent introduces coupling transistors (Q1A, Q1B, Q2A, Q2B) as intermediary elements between the sense transistors and the floating gate memory device. These coupling transistors act as mediators that enable the sense amplifier to sense the floating gate voltage while protecting the sense transistors from direct exposure to high programming and erase voltages. The coupling transistors are configured to be in a high-impedance state during programming and erasing operations, effectively isolating the sense transistors from damaging voltage levels while still allowing accurate voltage sensing when needed.
2Productivity
If read operations are performed frequently without intervening program or erase operations, then productivity is improved, but the stored charge integrity is lost due to disturbance and leakage
Solution Approach 1:
The patent implements preliminary protective actions by configuring the coupling transistors to automatically enter a high-impedance state during programming and erasing operations, before any potential charge leakage can occur. This preliminary isolation prevents the accumulation of damage that would otherwise occur during frequent read operations. Additionally, the sense amplifier is designed with automatic level shifting capability that prepares the sensing circuitry in advance to handle varying floating gate voltages without disturbing the stored charge.
3Device complexity
If the sense transistor is directly connected to the floating gate, then device complexity is reduced, but the gate oxide is exposed to stress from high voltages causing damage
Solution Approach 1:
The patent segments the sense amplifier structure by introducing separate coupling transistors (Q1A, Q1B, Q2A, Q2B) that are distinct from the main sense transistors. This segmentation allows the coupling transistors to specifically handle the high-voltage isolation function, while the sense transistors focus on the voltage sensing function. The coupling transistors are configured with their source and drain terminals connected to the floating gate through isolation mechanisms, effectively dividing the voltage stress management from the sensing function and protecting the gate oxide of sense transistors from high-voltage stress.
Data Source
AI summary
A method and apparatus for protecting a sense transistor in a sense amplifier during memory programming and erase operations, and for increasing the coupling efficiency of the memory device during the programming and erase operations may include floating a first terminal and a second terminal of the sense transistor while programming and erasing the memory device.