Sense Transistor Layout for Stable Sense Ratio in Semiconductor Chips

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Solution Overview

Problem

Peeling in the conductive member connecting the lead and electrode of a semiconductor device during manufacturing leads to fluctuations in the peeling area, affecting the performance of the semiconductor device, particularly in inverter circuits for brushless DC motors, due to changes in the sense ratio and potential distribution.

Innovation Solution

The semiconductor device is designed with a non-overlapping region between the plate-shaped member and the electrode, positioning the sense transistor away from the peeling area to minimize the impact of potential changes caused by peeling, ensuring stable sense ratio and improved detection accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the sense transistor is arranged near the electrode and plate-shaped member connection area, then the detection capability is improved, but the sense ratio fluctuates due to peeling in the conductive member

Engineering Contradiction:
Improvedetection accuracyVSAvoidsense ratio stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The sense transistor is extracted from the overlapping region between the electrode and plate-shaped member, and relocated to a non-overlapping region. This separation removes the sense transistor from the harmful electromagnetic field and potential distribution changes caused by peeling, while maintaining its detection function through proper electrical connection via pads and conductors.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

A conductor is introduced as an intermediary element to connect the sense transistor to the electrode system. The conductor acts as a mediator that transmits the necessary electrical signals from the electrode area to the sense transistor without exposing the transistor directly to the harmful electromagnetic environment, thus maintaining detection accuracy while ensuring sense ratio stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If the sense transistor is positioned in the overlapping region, then the compactness is improved, but the performance deteriorates due to potential changes from peeling

Engineering Contradiction:
Improvedevice areaVSAvoidperformance stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The layout transitions from a two-dimensional compact arrangement to a three-dimensional spatial distribution. The sense transistor is positioned in a non-overlapping region that utilizes the available space in different spatial dimensions, allowing separation from the electrode-plate interface while maintaining electrical connectivity through conductors and pads, thus achieving both compactness and performance stability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If the conductive member connects the lead and electrode directly, then the manufacturing process is simplified, but peeling occurs causing performance fluctuations

Engineering Contradiction:
Improvemanufacturing processVSAvoidpeeling resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The direct connection between the lead and electrode is segmented into multiple discrete components: the plate-shaped member, the conductor, and the pad. This segmentation distributes the electrical connection across multiple interfaces and structural elements, reducing stress concentration and minimizing the risk of peeling at any single connection point, while maintaining manufacturing feasibility.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12512391B2Semiconductor device
Publication Date: 2025.12.30 RENESAS ELECTRONICS CORP
  • US12512391B2 patent drawing
  • US12512391B2 patent drawing
  • US12512391B2 patent drawing

AI summary

A semiconductor device includes a semiconductor chip hazing a non-overlapping region in which a source pad for main transistor and a clip do not overlap with each other. At this time, a sense transistor is arranged in a region of the non-overlapping region, which is located between a first portion of the clip and a first short side of the source pad for main transistor in a plan view.