Sensing Chip Package Structure With Exposed Sensor Surface

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Solution Overview

Problem

The 2.5D packaging method, such as CoWoS, is not suitable for sensing chips like MEMS and optical sensor chips as the molding compound covers the chip surface, preventing sensing signals from penetrating.

Innovation Solution

A package structure featuring a silicon interposer with through-silicon-vias connecting chips to the substrate, where sensing chips are exposed while non-sensing chips are molded with compound, using a protective cover and precise thinning and grinding to expose sensing chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If CoWoS 2.5D packaging method is used, then multi-chip integration is achieved, but sensing signals cannot penetrate the molding compound

Engineering Contradiction:
Improvemulti-chip integration capabilityVSAvoidsensing signal transmission
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The packaging structure segments chips into two categories: sensing chips that remain exposed for signal transmission, and non-sensing chips that are molded for protection. This segmentation allows the package to simultaneously achieve multi-chip integration while maintaining sensing signal penetration capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the package have different properties: the sensing chip region remains exposed without molding compound to allow signal penetration, while non-sensing chip regions are covered with molding compound for protection. This local differentiation resolves the contradiction between integration and signal transmission.

Inventive Principle:
Principle #3Local quality

2Reliability

If sensing chips are exposed without molding compound, then sensing signals can penetrate, but chip protection is reduced

Engineering Contradiction:
Improvesensing signal transmissionVSAvoidchip protection
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The package structure segments chips into sensing chips (exposed) and non-sensing chips (molded), allowing unprotected signal transmission paths while providing protection elsewhere through the molding compound covering non-sensing chips and surrounding structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The exposed sensing chips act as intermediaries that transmit signals from the external environment to the internal circuitry without being blocked by molding compound, while the molding compound provides protection to other components.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If through-silicon-vias are formed in silicon interposer, then electrical connection between chips and substrate is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connection capabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The silicon interposer with through-silicon-vias serves multiple functions: providing electrical interconnection between chips and substrate, enabling signal routing, and offering mechanical support. This multi-functionality justifies the manufacturing complexity by consolidating multiple roles into a single component.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables effective packaging of sensing chips by allowing signal penetration through the exposure of sensing chips, overcoming the limitations of prior art packaging methods.

Implementation Method 1

the through-silicon-vias connect the upper surface to the lower surface of the silicon interposer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the lower parts of the plurality of through-silicon-vias are provided with bumps, the plurality of through-silicon-vias are connected with the substrate through the bumps

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20240186200A1Sensing chip packaging structure and method
Publication Date: 2024.06.06 NAT CENT FOR ADVANCED PACKAGING CO LTD
  • US20240186200A1 patent drawing
  • US20240186200A1 patent drawing
  • US20240186200A1 patent drawing

AI summary

The present invention relates to the field of chip packaging technology, and proposes a package structure and method of sensing chip. The package structure comprising: a substrate; a silicon interposer; and a plurality of chips, the plurality of chips comprising sensing chips as well as non-sensing chips, wherein the non-sensing chips are molded with molding compound and the sensing chips are exposed. By arranging a protective cover above the sensing chip before the front side of the chip is molded, and grinding off the top of the protective cover after molding, the present invention can well solve the problem that the sensing signal of the sensing chip cannot penetrate the molding compound in the prior art, and can be effectively used for the packaging of the sensing chip.