Sensing Circuitry In-Memory Logic Operations
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memory systems face challenges in reducing power consumption and increasing parallel processing capabilities when performing logical operations, particularly in processor-in-memory (PIM) devices where external processing resources are required, leading to increased chip size and power usage.
Innovation Solution
The implementation of sensing circuitry within the memory array that performs logical operations using data values stored in memory cells without transferring data via a sense line address access, allowing for complete compute functions like integer operations and content addressable memory functions without external processing resources, thereby reducing power consumption and enhancing parallelism.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If external processing resources are used to perform logical operations, then processing capability is improved, but chip size and power consumption increase
Solution Approach 1:
The patent merges the processing resources with the memory array by implementing logic operations directly within the memory structure. Memory cells are configured to perform logical operations (AND, OR, NOT, NAND, NOR, XOR) on stored data without requiring external processing units, thus combining storage and computation functions into a single integrated structure that reduces chip size while maintaining processing capability
Solution Approach 2:
The memory cells are designed to serve multiple functions: they can store data and simultaneously perform logical operations on that data. The same memory infrastructure that stores information is also used as the processing unit, eliminating the need for separate dedicated processing circuits and reducing overall chip area requirements
2Productivity
If external processing resources are used to perform logical operations, then processing capability is improved, but power consumption increases
Solution Approach 1:
By merging storage and computation in the same memory structure, the patent eliminates the need for data transfer between memory and external processors. The logical operations are performed in-place on stored data using the memory cells themselves, which significantly reduces the energy consumption associated with data movement and external processing operations
Solution Approach 2:
The patent extracts the processing function from external resources and embeds it directly within the memory structure. This allows logical operations to be performed using only the power required by the memory cells themselves, rather than requiring additional power for external processing units and data transfer interfaces
3Productivity
If data is transferred via sense line address access for processing, then processing can be performed, but power consumption and processing time increase
Solution Approach 1:
The patent extracts data from the memory array directly to the output without requiring it to be transferred through the sense line address access path. Logic operations are performed while data remains in the memory cells, and results are read out directly, eliminating the time-consuming intermediate transfer step that would otherwise be required for external processing
4Productivity
If data is transferred via sense line address access for processing, then processing can be performed, but power consumption increases
Solution Approach 1:
The patent combines the data storage location with the processing location, so that logical operations are performed on data while it remains stored in the memory cells. This eliminates the need for energy-consuming data transfer operations through the sense line address access path, as processing occurs in-place at the storage location
Data Source
AI summary
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry is configured to perform a logical operation using a data value stored in a first memory cell coupled to a sense line as a first input and a data value stored in a second memory cell coupled to the sense line as a second input. The sensing circuitry is configured to perform the logical operation without transferring data via a sense line address access.