Sensor Amplifier Circuit With Real-Time Offset Cancellation

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Solution Overview

Problem

Existing amplifier circuits struggle to accurately amplify weak signals from sensors while minimizing the influence of disturbance noise and offset components, leading to reduced accuracy and increased chip size due to the need for additional circuitry for phase compensation.

Innovation Solution

The amplifier circuit employs a configuration with GM amplifiers, capacitive elements, and selector circuits to perform differential amplification and real-time offset cancellation, utilizing a control circuit to switch between states for accurate signal amplification and offset correction without additional phase compensation circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If additional phase compensation circuits are added to improve amplification accuracy, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveamplification accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines the offset cancellation function and phase compensation function into a single operational amplifier circuit. The operational amplifier simultaneously performs differential amplification, offset cancellation through its input terminals, and phase compensation, eliminating the need for separate phase compensation circuits while maintaining amplification accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The operational amplifier is designed to perform multiple functions: differential amplification of the sensor signal, offset cancellation through differential input configuration, and phase compensation. This multi-functional approach reduces the overall circuit complexity while improving measurement precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If additional circuitry for phase compensation is added, then amplification accuracy is improved, but chip size increases

Engineering Contradiction:
Improveamplification accuracyVSAvoidchip size
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges phase compensation functionality into the main operational amplifier circuit rather than using separate phase compensation circuits. This integration significantly reduces the chip area required while maintaining high amplification accuracy through the operational amplifier's inherent phase compensation capabilities.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If offset correction is performed using separate circuits, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveoffset cancellation accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines offset cancellation and signal amplification into a single operational amplifier stage. The differential input configuration allows the operational amplifier to simultaneously cancel offset voltages and amplify the sensor signal, eliminating the need for separate offset correction circuits and reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12381526B2Amplifier circuit and sensor circuit
Publication Date: 2025.08.05 KK TOSHIBA
  • US12381526B2 patent drawing
  • US12381526B2 patent drawing
  • US12381526B2 patent drawing

AI summary

According to an embodiment, there is provided an amplifier circuit including a first capacitive element, a first GM amplifier, and a second GM amplifier. The first GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element. The second GM amplifier includes a first input node, a second input node, and an output node. The output node is connected to one end of the first capacitive element and the second input node.