Image Sensor Substrate Layout for Inspection Without Signal Stubs
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Solution Overview
Problem
The packageless structure of image sensors, which mounts a sensor chip directly on a printed circuit board, faces challenges such as reduced space for components due to the need for heating and additional terminals for inspection, leading to potential signal quality degradation.
Innovation Solution
An image capturing unit with a substrate that includes separate areas for mounting components and a semiconductor chip, featuring input wiring lines, first electrodes, and an input connector, allowing for efficient inspection without compromising signal quality by optimizing the layout and using wire bonding pads and check pads for connection and inspection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of stationary object
If the sensor chip is mounted directly on the printed circuit board in a packageless structure, then the weight and size of the image sensor are reduced, but the area available for mounting components on the printed circuit board is decreased due to the need for heating and additional inspection terminals
Solution Approach 1:
The patent divides the substrate into distinct functional areas: a first area for mounting electronic components and a second area for mounting the semiconductor chip. This segmentation allows independent optimization of each area, enabling component mounting in the first area without interfering with the chip mounting and inspection processes in the second area, thereby resolving the space conflict.
Solution Approach 2:
The patent utilizes the vertical dimension by routing inspection wiring lines through the thickness of the substrate rather than confining all connections to the surface plane. Check pads are formed on the back surface of the substrate, allowing inspection connections to be made from the opposite side, thus avoiding competition for surface mounting area between components and inspection terminals.
2Reliability
If additional terminals for inspection are added to the printed circuit board, then the sensor chip can be inspected after mounting, but the board size increases
Solution Approach 1:
The patent combines the inspection function with existing substrate structures. Check pads are integrated into the substrate itself rather than requiring separate external terminals, and inspection wiring lines are routed through the substrate using the same wiring infrastructure as signal lines, thereby providing inspection capability without proportionally increasing board size.
Solution Approach 2:
The inspection terminals (check pads) are positioned on the back surface of the substrate, utilizing the third dimension (thickness) rather than consuming additional surface area. This allows inspection connections to be made from the opposite side of where the chip is mounted, effectively adding inspection functionality without increasing the footprint of the board.
3Reliability
If a terminal for inspection is provided to output lines operating at high-speed clock, then the sensor chip can be inspected, but a stub is added to the output line which may degrade the quality of the output signal
Solution Approach 1:
The patent separates inspection wiring lines from signal output lines by routing them through different paths within the substrate. Inspection wiring lines are dedicated exclusively to inspection functions and do not share conductors with high-speed signal lines, thereby preventing stub formation on signal lines while still providing comprehensive inspection capability.
Solution Approach 2:
The substrate acts as an intermediary structure that provides separate routing paths for inspection and signal functions. By using the substrate's internal wiring layers and three-dimensional routing capabilities, the patent enables inspection connections without introducing discontinuities or stubs into the high-speed signal transmission paths.
Data Source
AI summary
An image capturing unit includes a plurality of input wiring lines for controlling the semiconductor chip, a plurality of first electrodes connecting to the input wiring lines, and an input connector connecting to the input wiring lines. The substrate includes a first area for mounting an electronic component in an opposite surface on which the semiconductor chip is mounted and a second area for use in mounting the semiconductor chip. The connector is disposed in the first area. At least one or more of the first electrodes are disposed in the second area.