Sensor Chip Layer Structure for CMP Flatness and Bonding
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Solution Overview
Problem
In Chip on Wafer (CoW) processes, the thickness difference between the semiconductor chip and the wafer surface creates significant steps, leading to recesses and projections that are difficult to flatten with Chemical Mechanical Polishing (CMP), resulting in defects like voids and poor bonding, and stress-induced changes in transistor characteristics and positional deviations.
Innovation Solution
A sensor device with a first substrate, a second substrate on one surface, an insulating first film covering the second substrate, and a second film of different material facing the first film, allowing for polishing with the second film as a stopper layer to flatten the surface and reduce stress through material shrinkage and reaction forces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CMP processing is performed on the insulating film to flatten the surface, then the flatness of the insulating film surface is improved, but voids or dishing occur between semiconductor chips or at the periphery
Solution Approach 1:
A stopper layer is formed on the wafer surface before depositing the insulating film. This stopper layer fills the steps between semiconductor chips in advance, creating a preliminary flat surface that prevents void formation during subsequent CMP processing while maintaining bonding quality.
2Length of stationary object
If the insulating film is made thick to cover the large step between chip and wafer, then the coverage is improved, but stress increases causing transistor characteristic changes
Solution Approach 1:
The stopper layer is formed locally only in the step regions between semiconductor chips, not uniformly across the entire wafer. This localized approach provides necessary coverage in critical areas while minimizing overall stress on the insulating film and semiconductor chips, preventing transistor characteristic changes.
3Manufacturing precision
If CMP processing is performed to flatten the insulating film, then the flatness is improved, but dishing occurs at the outer periphery portion of the wafer
Solution Approach 1:
The stopper layer is formed in advance on the wafer surface to compensate for steps before insulating film deposition. This preliminary flattening action reduces the depth of recesses that would otherwise require aggressive CMP processing, thereby preventing dishing at the wafer periphery while achieving the necessary flatness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents defects such as voids and poor bonding, maintains transistor characteristics, and reduces positional deviations by flattening the surface and relaxing stress in the semiconductor chip.
Implementation Method 1
CMP (Chemical Mechanical Polishing) processing is performed on the surface of the insulating film
Implementation Method 2
stress is generated in the semiconductor chip due to the difference in coefficient of thermal expansion between the semiconductor chip and the insulating film
Data Source
AI summary
There are provided a sensor device and an electronic apparatus that are capable of reducing the occurrence of defects. The sensor device includes: a first substrate; a second substrate provided on a side of one surface of the first substrate; an insulating first film that is provided on the side of the one surface and covers the second substrate; and a second film that is formed of a material different from that of the first film and provided at a position facing the first substrate across the first film. The second substrate and the first film are intermixed in a first layer and the first film and the second film are intermixed in a second layer. The second film is present outside the second substrate in plan view from a direction normal to the one surface.