Sensor Control Circuit with Multiple Interrupt Terminals
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Solution Overview
Problem
Conventional sensor control circuits face issues with processing multiple interrupt requests efficiently, leading to delayed processing of high-priority detection results due to a single interrupt terminal and competing interrupts, particularly in applications like dropping detection where urgency is critical.
Innovation Solution
A sensor control circuit with multiple interrupt terminals allows for separate and prioritized notification and processing of detection results and interrupt notifications based on mode information, enabling the host CPU to recognize and process critical events with maximum priority.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single interrupt terminal is used for notification of interrupt, then the device complexity is reduced, but the processing speed and priority handling of critical events deteriorates
Solution Approach 1:
The single interrupt terminal is segmented into multiple interrupt terminals (INT0 and INT1), allowing different types of interrupt notifications to be handled through separate channels. This segmentation enables the host CPU to process critical events faster by receiving notifications through the appropriate terminal without waiting for other less urgent notifications.
2Device complexity
If a single interrupt terminal is used for notification of interrupt, then the device structure is simplified, but the productivity of interrupt processing deteriorates
Solution Approach 1:
The interrupt notification function is segmented into multiple terminals, with INT0 dedicated to detection results and INT1 to other interrupt notifications. This allows parallel processing of different interrupt types, significantly improving the productivity of interrupt handling by eliminating the need for the host CPU to sequentially process all notifications through a single terminal.
Solution Approach 2:
The sensor control circuit acts as an intermediary that selectively outputs different types of notifications through different interrupt terminals based on the type of event detected. This intermediary function optimizes the communication between the sensor control circuit and the host CPU, enabling efficient prioritization and parallel processing of interrupt events.
3Productivity
If all processing is performed by the sensor control circuit with only final conclusion reported to the host CPU, then the processing load on the host CPU is reduced, but the ability to handle multiple prioritized interrupt types deteriorates
Solution Approach 1:
The processing functions are segmented between the sensor control circuit and the host CPU. The sensor control circuit performs detailed processing and generates multiple types of notifications, while the host CPU receives these segmented notifications through different interrupt terminals and performs only the final decision-making. This segmentation maintains low host CPU load while preserving the ability to handle multiple prioritized interrupt types.
Data Source
AI summary
A sensor control circuit includes an acceleration sensor which detects acceleration and generates a detection signal. The sensor control circuit also includes a processing section which generates a calculation result by calculating the acceleration in accordance with the detection signal, and generates an interrupt notification. The sensor control circuit also includes an interrupt output circuit. The interrupt output circuit has a threshold value determination section which generates a detection result by determining a change condition. The change condition is determined by comparing the calculation result with the threshold value. The interrupt output circuit also has a plurality of INT terminals and a selection section. The selection section selects the detection result or the interruption notification in accordance with mode information which is set from a host CPU and sends the selected signal from the INT terminal through the associated INT terminal.


