Sensor Unit ESD Protection via Silicone Adhesive Layer
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Solution Overview
Problem
The existing sensor units are vulnerable to electrostatic discharge (ESD) due to high voltage, which can destroy the internal circuit of the sensor chip, and incorporating an ESD protection circuit is challenging due to space constraints in downsized sensor chips.
Innovation Solution
An electrostatic protection layer made of silicone-based adhesive is formed on the hermetic glass and housing surfaces where the terminals protrude, enhancing the sensor unit's resistance to static electricity regardless of the presence or absence of an ESD protection circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ESD protection circuit is incorporated into the sensor chip, then resistance to electrostatic discharge is improved, but the area of the sensor chip increases
Solution Approach 1:
The patent introduces an intermediary ESD protection circuit between the sensor chip and external connections (lead wires or terminal blocks) to divert electrostatic discharge away from the sensor chip's internal circuit. This mediator absorbs or redirects the high voltage before it reaches the vulnerable sensor chip, protecting it while maintaining a compact design.
Solution Approach 2:
The ESD protection circuit acts as a sacrificial component designed to absorb electrostatic discharge events. It is positioned to take the damage from ESD strikes, protecting the more valuable and sensitive sensor chip. The protection circuit can be replaced if damaged, while the main sensor chip remains intact.
2Area of moving object
If the sensor chip is downsized to meet space requirements, then device compactness is improved, but the ability to incorporate ESD protection circuit is reduced
Solution Approach 1:
The patent segments the ESD protection function from the sensor chip itself, placing it in a separate location (either in the lead wires or in a terminal block). This allows the sensor chip to remain small and compact while the ESD protection functionality exists in a separate, dedicated component that does not compete for space on the chip.
Solution Approach 2:
The patent moves the ESD protection circuit from the two-dimensional plane of the sensor chip to another dimension - either in the wiring harness leading to the chip or in a separate terminal block assembly. This spatial relocation allows both the compact sensor chip and the ESD protection circuit to coexist without competing for the same limited chip area.
3Ease of operation
If lead wires are used for electrical connection, then ease of connection is improved, but vulnerability to ESD is increased due to longer exposure paths
Solution Approach 1:
The patent applies preliminary anti-action by incorporating ESD protection measures at the point where lead wires connect to the sensor chip. The protection circuit is positioned in advance along the electrical path to intercept and neutralize electrostatic discharge before it can travel through the lead wires and damage the sensor chip's internal circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The electrostatic protection layer effectively improves the sensor unit's resistance to static electricity, protecting the internal circuit from ESD without the need for additional space-consuming ESD protection circuits.
Implementation Method 1
An internal circuit in the sensor chip as described above may be destroyed by a high voltage attributed to electrostatic discharge (ESD)
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
In a sensor unit, a lower end surface of a terminal block (24) is attached to an upper end surface (12ES1) of a housing (12) by using a silicone-based adhesive in such a way as to cover an upper end surface (14ES1) of a hermetic glass (14). A covering layer (10A) made of a silicone-based adhesive is formed in a given thickness on the entire upper end surface (14ES1) of the hermetic glass (14), from which a group of input-output terminals (40ai) protrude.