Sensor IC Protocol Switching for Rapid Serial Data Readout
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Solution Overview
Problem
Existing sensor arrays require significant computational power and resources to read data from multiple sensors within a short time, leading to increased system complexity and cost, and introduce issues like high-clock speeds, transient signals, and jitter.
Innovation Solution
A switchable-protocol rapid-data-transfer sensor array that includes a controller and sensor ICs with a protocol switch to transition between RSDO and SPI modes, allowing efficient data transfer without additional hardware, using a backdoor mechanism to seamlessly switch between communication protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed processors and high-speed ADCs are employed to read data from multiple sensors within a short time, then data reading speed is improved, but system complexity and cost increase
Solution Approach 1:
The sensor array is divided into multiple groups, with each group having a dedicated low-speed ADC. This segmentation allows parallel processing of sensor data from different groups, achieving high overall data reading speed without requiring a single high-speed processor or ADC, thus reducing system complexity
Solution Approach 2:
Multiple sensor groups are combined and read out through a single high-speed serial interface (RSDO). The individual low-speed ADCs feed into a shift register that serializes the data, merging multiple data streams into one high-speed output that can be efficiently captured by the processor
2Speed
If high-speed processors and high-speed ADCs are employed to read data from multiple sensors within a short time, then data reading speed is improved, but cost increases
Solution Approach 1:
The system uses multiple inexpensive low-speed ADCs instead of one expensive high-speed ADC. Each ADC serves a specific sensor group and can be selected from standard, cost-effective components, significantly reducing the overall system cost while maintaining high data reading speed through parallel operation
Solution Approach 2:
The patent uses replicated instances of simple, low-cost components (multiple identical low-speed ADCs and shift registers) rather than a single complex high-speed component. This replication strategy reduces cost by using proven, mass-producible standard components
3Speed
If high-clock speeds are used to achieve rapid data transfer, then data reading speed is improved, but harmful factors like transient signals, phase noise, and jitter increase
Solution Approach 1:
The system uses periodic clocking at low speeds during the data collection phase, with sensors and ADCs operating synchronously at manageable frequencies. The rapid transfer is achieved through the periodic shifting of already-collected data through the shift register, rather than continuous high-speed conversion
Solution Approach 2:
The data transfer process is segmented into two phases: a low-speed data collection phase using multiple low-speed ADCs, and a high-speed serialization phase using the shift register. This segmentation allows the harmful effects of high-clock speeds to be isolated to the serialization phase rather than affecting the entire data acquisition process
Data Source
AI summary
Rapid-data-transfer sensor arrays include a controller and a plurality of sensor integrated circuits (ICs) connected in series and configured to periodically take measurements and provide measurement data to the controller as serial data. The sensor IC includes a power regulation circuit configured to selectively supply power for a low-power mode and an active mode for recording data and an internal shift register. When finished with the measurement, the sensor IC is configured to provide measurement data to the shift register for transfer to the controller. The controller is configured to initiate serial transfer of data from each of the shift registers of the first plurality of sensor ICs to the controller. Switching functionality provides the capability to switch sensors or sensor ICs from one operational mode to another, e.g., from a rapid serial data out (RDSO) mode to an SPI mode.