Multi-Processor Sensor Interrupt Handling via Dynamic Activation

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Solution Overview

Problem

Electronic devices with multiple processors connected to a single sensor experience time delays and inefficient power management when processing interrupt signals, leading to operational errors and increased consumption current.

Innovation Solution

An electronic device configuration that includes a sensor circuit, memory for handler activation information, and multiple processors, where the first processor updates interrupt handler information based on the system state and transmits sensor data to both processors, allowing each to process interrupts independently, thereby reducing time delays and consumption current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a single sensor is simultaneously connected to multiple processors, then processing speed and response time are improved, but operative errors occur and power management becomes inefficient

Engineering Contradiction:
Improveprocessing speedVSAvoidoperative errors
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent segments the interrupt handling function by introducing separate interrupt handlers for each processor (first interrupt handler for first processor, second interrupt handler for second processor). This segmentation allows each processor to independently manage its own interrupt processing, preventing operative errors while maintaining simultaneous connection to the sensor

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an interrupt handler as an intermediary layer between the sensor and processors. The interrupt handler receives interrupt signals from the sensor and routes them to the appropriate processor based on system state, enabling reliable multi-processor communication without direct conflicts

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a single sensor is connected to a single processor, then operative errors are avoided, but time delay and inefficient power management occur

Engineering Contradiction:
Improveoperative errorsVSAvoidtime delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements dynamic interrupt handler activation where the system state determines which processor's interrupt handler is active. The first processor handles interrupts during active states, while the second processor handles interrupts during sleep states, dynamically adapting to system conditions to minimize time delay while maintaining reliability

Inventive Principle:
Principle #15Dynamics

3Productivity

If multiple processors simultaneously process interrupt signals, then processing capacity is improved, but consumption current increases

Engineering Contradiction:
Improveprocessing capacityVSAvoidconsumption current
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by activating only the necessary processor's interrupt handler based on system state. Instead of having both processors continuously ready to handle interrupts, the system activates only the first interrupt handler during active states or only the second interrupt handler during sleep states, reducing power consumption while maintaining adequate processing capacity

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11650946B2Electronic device and method for processing sensor data of electronic device
Publication Date: 2023.05.16 SAMSUNG ELECTRONICS CO LTD
  • US11650946B2 patent drawing
  • US11650946B2 patent drawing
  • US11650946B2 patent drawing

AI summary

An electronic device according to various embodiments may comprise: a sensor circuit; a memory storing handler activation information; and a first processor and a second processor operatively connected to the sensor circuit and the memory. The sensor circuit may be configured to transmit an interrupt signal using an interrupt transmission unit comprising circuitry electrically connected to the first processor and the second processor, and configured to transmit sensor data using a sensor data transceiver electrically connected to the first processor and the second processor. The memory may store instructions which, when executed, cause the first processor to: amend or update interrupt handler activation information in the memory in response to a system state of the electronic device, and receive the sensor data from the sensor circuit in response to an interrupt signal transmitted from the sensor circuit based on identifying, using the interrupt handler activation information, that the first processor processes the interrupt of the sensor circuit; wherein the instructions, when executed, cause the second processor to: receive the sensor data from the sensor circuit in response to the interrupt signal transmitted from the sensor circuit based on identifying, using the interrupt handler activation information, that the second processor processes the interrupt of the sensor circuit.