Image Sensor Lag Mitigation with Truncated Prior-Frame Row Data

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Solution Overview

Problem

Image sensor devices experience lag due to retained charge in high K dielectric capacitors, leading to inter-frame artifacts and high lag values, especially at high frame rates, which affects image quality and requires increased electrical power to reduce lag.

Innovation Solution

A method that involves reading and correcting image data rows using truncated data from previous frames, applying dithering, and scaling with reset duration and frame rate to form lag-corrected data, while storing truncated data in memory, thereby minimizing lag without reducing frame read time or causing scene-dependent artifacts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If lag correction is performed using full row data from previous frames, then image quality is improved, but memory usage and processing complexity increase significantly

Engineering Contradiction:
Improvelag correction accuracyVSAvoidmemory usage and processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the most significant bits (MSBs) from the previous frame's row data for lag correction, rather than using the complete data. This selective extraction reduces memory bandwidth requirements and processing complexity while maintaining sufficient correction accuracy, directly resolving the contradiction between correction quality and system complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different truncation levels to different portions of the data based on their importance. By identifying and retaining only the critical MSBs for lag correction while discarding less significant bits, the system achieves effective lag mitigation with reduced computational resources, balancing accuracy and complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If more bits are retained from previous frames for lag correction, then lag amplitude is reduced, but power consumption and processing load increase

Engineering Contradiction:
Improvelag amplitude reductionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts only the essential most significant bits from previous frame data, avoiding the need to process and transmit complete row data. This selective bit extraction significantly reduces power consumption associated with memory access and data processing while maintaining effective lag correction performance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter of data representation by using truncated bit sequences instead of full-precision values. By transforming the data format to retain only necessary precision levels, the system reduces computational power requirements while preserving the critical information needed for lag correction.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If frame read time is reduced to maintain high frame rates, then productivity is improved, but lag correction accuracy deteriorates

Engineering Contradiction:
Improveframe rateVSAvoidlag correction accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent extracts only the critical most significant bits from previous frame data, enabling faster data retrieval and processing. This selective extraction allows the system to perform lag correction within the reduced time available at high frame rates without compromising correction effectiveness, as the essential correction information is obtained more quickly.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial correction using a subset of the available data (only MSBs rather than complete data). This partial action approach provides sufficient lag correction for high frame rate operation without requiring the full processing time that would be needed for complete data correction, thus maintaining productivity while achieving acceptable precision.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12126919B2Methods for mitigating lag in image sensor devices
Publication Date: 2024.10.22 SEMICON COMPONENTS IND LLC
  • US12126919B2 patent drawing
  • US12126919B2 patent drawing
  • US12126919B2 patent drawing

AI summary

Implementations of a method of mitigating lag for an image sensor device may include reading a row of data from an Nth frame of image data from an image sensor device; correcting the row of data using truncated row data from an N−1th frame stored in a memory operatively coupled with the image sensor device to form a lag corrected row of data; outputting the lag corrected row of data; truncating the row of data to form truncated row data from the Nth frame; and storing the truncated row data from the Nth frame in the memory.