Image Sensor Line Rate Synchronization for Zoom Upscaling

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Solution Overview

Problem

Conventional CMOS imaging apparatuses face challenges in providing good image quality during zoom operations due to the need for additional storage space and uneven exposures caused by reduced line rates and frame synchronization issues, especially when scaling up images.

Innovation Solution

An image pickup apparatus and method that utilizes the same line rate for upscaling and outputting images, comprising an image sensor array, scaling circuit, and timing control circuit, which synchronizes the read and output timing to maintain consistent line rates, allowing for real-time image processing and on-the-fly zoom and pan operations without additional storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the conventional CMOS imaging apparatus reads out all pixel data from the image sensor array at a line rate and processes it to generate upscaled image data, then the upscaled image can be output, but additional storage space (line buffer) is required to store lines that have not been output yet

Engineering Contradiction:
Improveimage processing speedVSAvoidstorage space
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent applies dynamics by making the image sensor array operate at a variable line rate that matches the output requirements. Instead of a fixed high line rate that requires buffering, the system dynamically adjusts the sensor's line rate to be equal to the output line rate, eliminating the need for additional storage while maintaining real-time processing capability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameter (line rate) of the image sensor array to match the output line rate. By setting the sensor line rate equal to the output line rate during zoom operations, the system transforms the parameter relationship between input and output, eliminating the temporal mismatch that necessitates buffering.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the conventional CMOS imaging apparatus operates the image sensor array at a reduced line rate to generate upscaled images, then storage space requirements are reduced, but uneven exposures occur and frame synchronization requirements cannot be met

Engineering Contradiction:
Improvestorage spaceVSAvoidimage quality consistency
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The system dynamically adjusts the image sensor array's line rate to match the output line rate, ensuring that data is produced and consumed at the same pace. This dynamic synchronization eliminates uneven exposures and frame synchronization issues while maintaining consistent image quality throughout the zoom operation.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the conventional CMOS imaging apparatus performs on-the-fly zoom operations with instantaneous clock frequency changes, then real-time zoom is achieved, but certain frames cannot be displayed due to frame synchronization issues

Engineering Contradiction:
Improvereal-time processing capabilityVSAvoidframe display continuity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic line rate adjustment where the image sensor array's line rate is continuously matched to the output line rate during zoom operations. This dynamic synchronization ensures that frame timing requirements are met continuously, enabling real-time zoom without dropping frames or experiencing synchronization issues.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10389962B2Image pickup apparatus and method utilizing the same line rate for upscaling and outputting image
Publication Date: 2019.08.20 HIMAX IMAGING LIMITED
  • US10389962B2 patent drawing
  • US10389962B2 patent drawing
  • US10389962B2 patent drawing

AI summary

An image pickup apparatus includes an image sensor array, a scaling circuit, an output circuit and a timing control circuit. The image sensor array reads N pixel lines according to a read timing control signal to capture N lines of pixel data of a source image. The scaling circuit receives the N lines of pixel data according to a scaling timing control signal, and refers to a scaling factor to scale up the source image to generate an upscaled image having M lines of pixel data. M is a positive integer greater than N. The output circuit outputs the M lines of pixel data according to an output timing. The timing control circuit determines a receiving timing according to the output timing and the scaling factor to generate the scaling timing control signal, and determines a read timing according to the receiving timing to generate the read timing control signal.