Sensor Package Layout With Exposed Sensing Regions and Protected I/O
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving smaller form factors and higher mechanical reliability for sensor packages due to limitations in existing packaging techniques, such as wire bond methods, which hinder the integration of advanced semiconductor dies and reduce manufacturing yield.
Innovation Solution
The integration of sensor dies into an Integrated Fan-Out (InFO) package, which includes a back-side redistribution structure with a dielectric layer and metallization pattern, and a front-side redistribution structure that exposes sensing regions while protecting input/output regions, allowing for smaller form factors, improved reliability, and increased yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If wire bond packaging methods are used, then manufacturing simplicity is maintained, but package size reduction and mechanical reliability are compromised
Solution Approach 1:
The patent extracts and eliminates the wire bond interconnect structure from the packaging system. By removing the wire bond method entirely and replacing it with direct chip-to-package substrate interconnection, the invention achieves smaller package size while improving mechanical reliability through direct bonding interfaces that eliminate wire bond fragility points.
Solution Approach 2:
The patent replaces the mechanical wire bond system with a direct semiconductor-to-package substrate bonding system. This substitution eliminates the mechanical wire bond structure that limits size reduction and provides poor mechanical reliability, replacing it with a more integrated direct bonding approach that enables both size reduction and improved reliability.
2Productivity
If wire bond packaging methods are used, then manufacturing simplicity is maintained, but manufacturing yield is reduced
Solution Approach 1:
The patent extracts the wire bond manufacturing process from the production line. By eliminating wire bond placement and bonding steps, the invention simplifies the manufacturing process and improves yield by removing a complex, error-prone intermediate step, even though the packaging structure itself becomes more integrated.
3Measurement precision
If sensing regions are exposed, then sensing accuracy is improved, but I/O region protection is compromised
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different regions on the sensor chip. The sensing regions are exposed to the environment for accurate sensing, while the I/O regions are covered by the package substrate for protection. This spatial differentiation of exposure and protection achieves both sensing accuracy and electrical protection simultaneously.
Data Source
AI summary
In an embodiment, a device includes: a sensor die having a first surface and a second surface opposite the first surface, the sensor die having an input/output region and a first sensing region at the first surface; an encapsulant at least laterally encapsulating the sensor die; a conductive via extending through the encapsulant; and a front-side redistribution structure on the first surface of the sensor die, the front-side redistribution structure being connected to the conductive via and the sensor die, the front-side redistribution structure covering the input/output region of the sensor die, the front-side redistribution structure having a first opening exposing the first sensing region of the sensor die.