Sensor Die Fan-Out Package with Exposed Sensing Region Sealing
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Solution Overview
Problem
The semiconductor industry faces challenges in creating smaller and more efficient packaging techniques for semiconductor dies as demand grows for shrinking electronic devices, particularly in integrating fan-out (InFO) technology.
Innovation Solution
A semiconductor package manufacturing process involving a carrier with a release layer and dielectric layer, conductive vias, integrated circuit die attachment, encapsulation, and a redistribution structure that exposes the sensing region while protecting the integrated circuit die, using a ring structure and seal ring for moisture and contamination prevention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sensing region is exposed to improve sensing functionality, then the sensing performance is improved, but the package becomes more vulnerable to moisture and contamination
Solution Approach 1:
The patent applies local quality by creating a selective opening structure where only the sensing region is exposed while other regions remain protected. The opening is precisely positioned to expose the sensing region, and the seal ring is strategically placed to protect vulnerable areas while allowing the sensing function to operate exposed to the environment.
2Measurement precision
If the opening is positioned closer to the sensing region to improve sensing access, then the sensing performance is improved, but the risk of delamination increases
Solution Approach 1:
The patent introduces a seal ring as an intermediary element between the opening and the sensing region. This seal ring serves as a protective mediator that allows the opening to be positioned close to the sensing region for optimal sensing access while preventing direct exposure of vulnerable areas to environmental factors that could cause delamination.
3Measurement precision
If the opening size is increased to improve sensing capability, then the sensing performance is improved, but the package becomes more susceptible to harmful environmental factors
Solution Approach 1:
The patent applies local quality by creating a selectively exposed structure where only the necessary sensing region is exposed through the opening, while other regions remain protected by the encapsulant and seal ring. This minimizes the exposed area to the minimum required for sensing functionality, reducing susceptibility to environmental factors.
4Object-affected harmful factors
If the seal ring is positioned to maximize protection, then the protection against moisture and contamination is improved, but the access to the sensing region is reduced
Solution Approach 1:
The patent applies segmentation by dividing the package structure into protected and exposed zones. The seal ring is positioned to create a clear segmentation between the protected internal regions and the exposed sensing region, allowing each zone to fulfill its specific function - protection where needed and sensing access where required.
Data Source
AI summary
A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern. The conductive vias extend through the molded semiconductor device and are electrically connected with the redistribution pattern.