Sensor Semiconductor Package Layout for Exposed Sensing Regions

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Solution Overview

Problem

The semiconductor industry faces challenges in creating smaller and more efficient packaging techniques for semiconductor dies, particularly in integrating fan-out (InFO) technology, where existing methods struggle to expose sensing regions while maintaining structural integrity and preventing delamination.

Innovation Solution

A semiconductor package design featuring a molded semiconductor device with a redistribution structure that includes a conductive layer with a redistribution pattern and a ring structure, where the ring structure surrounds the sensing region and is separated from the redistribution pattern, ensuring the sensing region is exposed and protected, and conductive vias are used to connect the pattern with the die.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional packaging structure is used to maintain structural integrity, then the package strength is improved, but the sensing region cannot be effectively exposed

Engineering Contradiction:

Improvepackage integrityVSAvoidsensing region exposure

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The packaging structure is segmented into distinct functional zones: a first opening exposes the sensing region while a second opening exposes the bond pad, allowing each region to be accessed independently without compromising overall structural integrity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the package are given different properties - the encapsulant has recesses at specific locations to expose functional regions, while maintaining full coverage and protection in other areas, creating localized access points without sacrificing overall protection

Inventive Principle:

Principle #3Local quality

2Ease of operation

If the sensing region is exposed by creating openings in the encapsulant, then the sensing capability is improved, but delamination and moisture ingress risks increase

Engineering Contradiction:

Improvesensing region accessibilityVSAvoiddelamination resistance

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

A barrier layer is applied beforehand to the sensing region before the encapsulant is formed, creating a protective cushion that prevents moisture ingress and delamination at the exposed sensing region while allowing the region to remain accessible

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The package uses composite material structures including the barrier layer combined with the encapsulant material, creating a multi-layer system that provides both exposure and protection simultaneously - the encapsulant provides mechanical strength while the barrier layer provides moisture and delamination resistance

Inventive Principle:

Principle #40Composite materials

3Volume of moving object

If the package size is reduced to meet shrinking device demands, then the compactness is improved, but the manufacturing precision requirements increase

Engineering Contradiction:

Improvepackage sizeVSAvoidfeature size control

Core Design Contradiction:

Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent moves functional elements into the vertical dimension - conductive vias extend through the encapsulant depth, and the barrier layer is positioned at specific depths, allowing compact horizontal footprint while maintaining functional separation and precision through vertical layering

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12381163B2Semiconductor package and manufacturing method thereof

Publication Date: 2025.08.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern. The conductive vias extend through the molded semiconductor device and are electrically connected with the redistribution pattern.