Sensor Data Processing Architecture for Low-Storage Multi-Task Recognition

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Solution Overview

Problem

Information processing apparatuses face an increase in software data storage requirements when executing multiple tasks with different applications, leading to performance issues and high costs due to the need for separate software for each task.

Innovation Solution

An information processing apparatus with a first processor for high-processing-load tasks and a second processor for lower-processing-load tasks, utilizing a selector to choose the appropriate processes based on predetermined conditions, and incorporating hardware logic like FPGAs for deep learning, allowing for shared feature extractors and determiners to reduce software data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate software is stored for each task to ensure task-specific functionality, then task execution capability is improved, but software data storage volume increases

Engineering Contradiction:
Improvetask execution capabilityVSAvoidsoftware data storage volume
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent implements a universal first processor that can execute multiple different first processes on sensor data, producing various types of first processed data. This single processor replaces the need for multiple separate software programs, allowing the system to perform diverse tasks (image recognition, speech recognition, etc.) while storing only one versatile processing module instead of multiple task-specific software packages.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent divides the processing workflow into distinct stages: a first processor handles initial data processing to produce first processed data, then a second processor handles subsequent processing to produce second processed data. This segmentation allows each processor to be optimized for its specific function while sharing common resources, reducing overall software storage requirements compared to having complete standalone software for each task.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple complete software packages are stored for different tasks, then task diversity is improved, but device memory requirements increase

Engineering Contradiction:
Improvetask diversityVSAvoiddevice memory requirements
Core Design Contradiction:
Adaptability or versatilityVSVolume of stationary object

Solution Approach 1:

The patent merges the functionality of multiple task-specific software packages into a unified processing architecture. The first processor and second processor work together as an integrated system that can handle multiple tasks by selecting and executing different process combinations from a shared pool of processing routines, eliminating the need to store complete separate software packages for each task.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system dynamically selects which specific first process and second process to execute based on the current task requirements and input data type. This dynamic process selection allows the same hardware architecture to adapt to diverse tasks without requiring static pre-loading of multiple complete software packages, thereby reducing memory requirements while maintaining task diversity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12008414B2Information processing apparatus, information processing method, and information processing program
Publication Date: 2024.06.11 SONY SEMICON SOLUTIONS CORP
  • US12008414B2 patent drawing
  • US12008414B2 patent drawing
  • US12008414B2 patent drawing

AI summary

An information processing apparatus comprising, at least one first processor configured to carry out a first process on data input from at least one sensor to produce first processed data, a selector configured to select, according to a first predetermined condition, at least one of a plurality of second processes, and at least one second processor configured to receive the first processed data from the at least one first processor and to carry out the selected at least one of the plurality of second processes on the first processed data to produce second processed data, each of the plurality of second processes having a lower processing load than the first process.