In-Sensor Shock Detection Using MLC and FSM Interrupt Thresholds
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Solution Overview
Problem
Conventional shock intensity estimation in electronic devices relies on continuous processing by the application processor, leading to high power consumption and increased latency, which is inefficient and burdensome.
Innovation Solution
A sensor with a machine learning core and finite state machine circuit offloads shock detection processing, autonomously calculating acceleration norms and generating interrupt signals to minimize processor workload, reducing power consumption and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the host processor continuously monitors acceleration data to detect shock events, then shock detection reliability is improved, but power consumption increases and latency increases
Solution Approach 1:
The system divides shock detection functionality into two segments: a low-power sensor module that continuously monitors acceleration data and generates interrupt signals when thresholds are exceeded, and a host processor that only activates upon receiving these interrupts to perform detailed analysis. This segmentation allows continuous monitoring without keeping the entire system at full power.
Solution Approach 2:
The sensor module performs preliminary shock detection by continuously comparing acceleration data against predefined thresholds and pre-processing the data to identify potential shock events. This preliminary action filters out false positives and only triggers host processor involvement when actual shock events are detected, reducing overall power consumption.
2Measurement precision
If the host processor continuously processes acceleration data, then shock detection accuracy is improved, but latency increases
Solution Approach 1:
The sensor module continuously pre-processes acceleration data and maintains readiness to detect shock events by continuously comparing data against thresholds. This preliminary action ensures that when a shock occurs, the system is already prepared to detect and report it immediately, reducing latency while maintaining accuracy.
Solution Approach 2:
The sensor module autonomously performs continuous monitoring, threshold comparison, and interrupt generation without requiring host processor intervention. This self-service capability allows the system to maintain high detection accuracy and low latency for shock events while keeping the host processor in a low-power state until actually needed.
3Speed
If the host processor is always-on to detect shock events, then detection response time is improved, but power consumption increases
Solution Approach 1:
The system segments processing responsibilities between a always-on low-power sensor module and an on-demand host processor. The sensor module handles continuous monitoring and immediate shock detection, while the host processor only activates when needed, achieving fast response times without sustained high power consumption.
Solution Approach 2:
The host processor operates periodically rather than continuously, activating only when the sensor module generates an interrupt signal indicating a potential shock event. This periodic operation maintains detection responsiveness while dramatically reducing average power consumption compared to an always-on host processor.
Data Source
AI summary
According to an embodiment, a sensor including a machine learning core (MLC) and a finite state machine (FSM) circuit for detecting a shock event is provided. The MLC continuously calculates a value based on the change in velocity. The FSM circuit compares the value to a first threshold and generates a first interrupt if it is greater than the first threshold. The FSM circuit then compares the value to a second threshold less than the first threshold and generates a second interrupt if it is less than or equal to the second threshold after the first interrupt. The MLC calculates a maximum value between the first and second interrupts and stores it in a register, which is read by an application processor of a host device after receiving the second interrupt. The maximum acceleration norm value is reset after a delay after the second interrupt is generated.