Sensor Signal Aggregation Using Bitwise Logic and Permutation
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Solution Overview
Problem
Existing wireless sensor networks face challenges in reducing the size and power consumption of local processing units due to the complexity of beamforming techniques required for forming aggregate signals, which leads to significant power dissipation.
Innovation Solution
A signal processing method that employs a swap module and aggregation block within the local processing unit to form an aggregate signal by modifying and combining sensor signals using permutation schemes and bitwise logical operators, reducing computational complexity and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If beamforming techniques are used to form aggregate signals from sensor outputs, then signal aggregation quality is improved, but power consumption and computational complexity increase significantly
Solution Approach 1:
The patent changes the computational parameters by replacing complex arithmetic operations (multiplication, addition) with simple bitwise logical operations (AND, OR, NOT) and permutation operations. This parameter change in the computational domain reduces the energy requirement while maintaining signal aggregation functionality through logical operations on quantized sensor data
Solution Approach 2:
The patent substitutes the traditional digital signal processing mechanism (requiring DSP with complex arithmetic) with a logic-based processing mechanism using bitwise operations and permutation networks. This substitution replaces the energy-intensive arithmetic computation with simpler logical operations that consume less power
2Measurement precision
If beamforming techniques are used to form aggregate signals, then signal processing accuracy is improved, but device complexity increases
Solution Approach 1:
The patent changes the computational parameters by replacing complex arithmetic operations with simple bitwise logical operations and permutation operations. This transforms the computational complexity from O(N²) arithmetic operations to O(N log N) logical operations, significantly reducing device complexity while maintaining processing accuracy
Solution Approach 2:
The patent segments the signal processing into distinct stages: quantization stage, permutation stage, and logical operation stage. Each stage handles a specific aspect of the processing, breaking down the complex beamforming task into manageable segments that can be executed with simpler operations
3Measurement precision
If traditional digital signal processing is used for beamforming, then aggregate signal quality is improved, but battery life is reduced
Solution Approach 1:
The patent changes the energy consumption parameter by replacing energy-intensive arithmetic operations with energy-efficient bitwise logical operations. This parameter change in the computational domain reduces the power dissipation per operation, thereby extending battery life while maintaining aggregate signal quality
Solution Approach 2:
The patent uses simple, low-cost logical operations that can be implemented with basic logic gates instead of complex arithmetic units. These simpler operations consume less energy and can be implemented with fewer transistors, effectively using 'cheaper' computational resources to extend battery life
Data Source
AI summary
Embodiment for forming an aggregate signal from a plurality of starting signals, comprising:acquiring said starting signals through respective sensors of a homogeneous sensors group;converting acquired signals in respective digital signals having data represented with a predetermined bits number;processing the digital signals to form aggregate signal.The processing step comprises the operations of:modifying digital signals changing the data format of each such digital signals from a first format to a second format, each data in the second format having been obtained from a respective data in the first format through an operation of permuting the bits position according to a permutation scheme associated with said data and to the specific digital signal comprising that data;forming aggregate signal obtaining said aggregate signal data by means of a bitwise logic operator acting upon said modified digital signal respective data.