Output Stage Circuit for SENT Signals Under Power Dips and EMI
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Solution Overview
Problem
Electronic systems, particularly in automotive environments, face challenges with supply voltage interruptions and electromagnetic interference, leading to signal errors and system instability, as existing solutions like large capacitors are not feasible in compact chip packages.
Innovation Solution
An integrated semiconductor device with an output-stage circuit that includes a digital-to-analog converter and an amplifier, utilizing multiple voltage regulators and a greatest-voltage selector circuit to maintain accurate signal transmission during power dips and EMI events, reducing the need for large external capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large capacitors (1-10 μF) are used for local power storage to maintain voltage during interruptions, then reliability during power dips is improved, but device size and footprint increase making them incompatible with compact chip packages
Solution Approach 1:
The patent changes the voltage parameter by generating an internal first voltage (3.3V) from the supply voltage (5V) and using this regulated voltage for the DAC and amplifier operations. This voltage parameter change allows the circuit to maintain reliable operation during supply interruptions at the lower internal voltage level, while the capacitor only needs to maintain this lower voltage rather than the full supply voltage, reducing the required capacitance value and physical size.
2Measurement precision
If supply voltage variations occur during signal generation, then signal accuracy deteriorates due to false voltage changes, but adding voltage regulation increases circuit complexity
Solution Approach 1:
The patent segments the voltage supply into two distinct levels: the original supply voltage (5V) and a regulated first voltage (3.3V). The DAC operates from the regulated first voltage while the amplifier can switch between supply voltage and first voltage. This segmentation allows precise voltage control for critical signal generation while maintaining overall system simplicity through selective voltage usage.
Solution Approach 2:
The patent introduces a voltage regulator as an intermediary component that converts the supply voltage (5V) to a stable first voltage (3.3V). This intermediary regulated voltage serves as a buffer between the variable supply voltage and the sensitive DAC circuitry, ensuring accurate voltage levels during signal edges without requiring complex regulation throughout the entire system.
3Use of energy by moving object
If the amplifier uses supply voltage directly, then power efficiency is improved, but signal accuracy deteriorates during voltage dips
Solution Approach 1:
The patent makes the amplifier's voltage supply dynamic by enabling it to switch between the supply voltage and the first voltage based on operational needs. During normal operation, the amplifier uses the supply voltage for maximum power efficiency. During supply voltage dips or critical signal transmission periods, it switches to the regulated first voltage to maintain signal accuracy. This dynamic voltage switching optimizes both power efficiency and signal accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables reliable and error-free data transmission according to the SENT protocol, even during supply voltage interruptions, by ensuring accurate voltage levels during critical signal edges, thus enhancing system robustness and reducing CRC errors.
Implementation Method 1
a first voltage regulator adapted for generating a first voltage signal having a nominal first voltage level lower than the nominal supply voltage level, and for storing energy on a first capacitor at the nominal first voltage level
Implementation Method 2
a digital to analog convertor responsive to the digital input signal and adapted to produce a converted signal
Implementation Method 3
an amplifier configured for receiving and amplifying the converted signal, thereby generating the analog output signal
Implementation Method 4
an output stage circuit further comprising a greatest-voltage selector circuit adapted for selecting a signal having a largest voltage level amongst a plurality of at least two signals including the supply voltage signal and the first voltage signal
Data Source
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AI summary
An integrated circuit comprising an output stage circuit (99). The output stage circuit comprises: an input node for receiving a digital input signal (10); a supply voltage node for receiving a supply voltage signal (55); a digital to analog convertor (20) for converting the digital signal; an amplifier (40) for amplifying the converted signal; a first/second and optionally third voltage regulator (70) generating a first/second and optionally third voltage signal; a greatest-voltage selector circuit (90) for providing power to the amplifier. Two different voltages are provided to the DAC. The output signal can be a SENT signal. The circuit is highly robust against power-interruptions and EMI.