Separate Charge Storage Capacitor Layer for High-Density Imaging Arrays

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Solution Overview

Problem

High-density imaging arrays face challenges in achieving small pixel sizes due to reduced charge storage capacity, which decreases sensitivity and noise equivalent differential temperature (NEDT) values, limiting the realization of high-performance imaging arrays with small pixel pitch.

Innovation Solution

A separate charge storage capacitor layer is introduced, which is electrically interconnected with the photodetector and ROIC layers, allowing for micromachined capacitors with sequential conductive-insulating-conductive thin-film coatings, enabling increased capacitance without occupying additional circuit area and allowing for separate fabrication of each layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If pixel size is reduced to achieve high-density arrays, then array density increases, but charge storage capacity decreases

Engineering Contradiction:
Improvearray densityVSAvoidcharge storage capacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent transitions from planar charge storage to vertical three-dimensional capacitor structures. The capacitors extend vertically through multiple layers (from the first substrate through the ROIC layer to the second substrate), utilizing the vertical dimension to increase storage capacity without occupying additional horizontal area within each pixel.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The charge storage capacitors are nested within the vertical stack of the imaging array structure. The capacitors are positioned between and integrated with multiple functional layers including the photodetector layer, ROIC layer, and interconnection layers, effectively nesting the storage function within the existing structural hierarchy.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If charge storage capacitor size is increased to improve sensitivity, then NEDT value improves, but circuit area is consumed

Engineering Contradiction:
ImprovesensitivityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention moves charge storage from a two-dimensional planar configuration to a three-dimensional vertical structure. The capacitors extend through the vertical depth of the device, allowing large capacitance values to be achieved within the footprint of each pixel without consuming additional lateral circuit area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The charge storage function is segmented from the ROIC circuitry into a separate vertical capacitor structure. This segmentation allows the ROIC to maintain its standard circuit area while the capacitors occupy the vertical space, enabling independent optimization of both circuit functionality and charge storage capacity.

Inventive Principle:
Principle #1Segmentation

3Reliability

If charge storage capacitor size is increased to improve sensitivity, then NEDT value improves, but pixel size must be increased

Engineering Contradiction:
ImprovesensitivityVSAvoidpixel size
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent resolves this contradiction by utilizing the vertical dimension for charge storage. The capacitors extend vertically through the device structure, providing large storage capacity without increasing the horizontal pixel dimensions, thus maintaining small pixel size while achieving high sensitivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Quantity of substance

If separate charge storage capacitor layer is added, then capacitance per unit area increases, but device complexity increases

Engineering Contradiction:
Improvecapacitance per unit areaVSAvoidlayer structure complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The charge storage capacitor layer is merged with the existing imaging array structure through vertical integration. The capacitors are formed using the same substrate and interconnection layers that are already present for the photodetectors and ROIC, combining multiple functions within a unified vertical architecture rather than adding completely separate structures.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8742308B2Imaging array device structure with separate charge storage capacitor layer
Publication Date: 2014.06.03 TELEDYNE SCIENTIFIC & IMAGING LLC
  • US8742308B2 patent drawing
  • US8742308B2 patent drawing
  • US8742308B2 patent drawing

AI summary

An imaging array comprises a photodetector layer, a readout IC (ROIC) layer, and a charge storage capacitor layer which is distinct from the photodetector and ROIC layers; the layers are electrically interconnected to form the array. The capacitors within the charge storage capacitor layer are preferably micromachined; the charge storage capacitor layer can be an interposer layer or an outer layer.