Separate N and P Fin Etching for CMOS Leakage Reduction
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Solution Overview
Problem
In the semiconductor industry, existing technologies face challenges in forming CMOS devices with precise control over N-region and P-region fin dimensions, leading to potential degradation of materials and suboptimal device performance due to the limitations of optical lithography and etching processes.
Innovation Solution
A method is developed to form N-region and P-region fins with substantially the same critical dimensions by protecting one region during the formation of the other, using a conformal mask layer to prevent material degradation and ensuring precise vertical profiles, allowing for the separate formation of n-type and p-type FinFETs on the same wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If optical lithography is used for device scaling, then manufacturing cost is reduced and device speed is increased, but minimum dimensions and pitch are limited by radiation wavelength
Solution Approach 1:
The patent segments the fin formation process into separate etching steps for N-type and P-type fins. By blocking one region during each etching step and selectively forming fins in alternating regions, the process achieves precise dimensional control that overcomes optical lithography limitations. This segmentation allows each fin type to be formed with optimized parameters independent of the other.
Solution Approach 2:
The patent applies preliminary blocking actions by depositing conformal mask layers and using selective blocking regions before the actual fin etching. The conformal mask layer is deposited over the substrate, and specific regions are blocked to protect them during subsequent etching steps. This preliminary protection enables precise fin formation without material degradation.
2Ease of manufacture
If conventional etching processes are used for fin formation, then manufacturing simplicity is maintained, but material degradation occurs and fin dimension precision is reduced
Solution Approach 1:
The patent implements local quality by applying different processing conditions to different regions of the substrate. N-type fins and P-type fins are formed in separate blocked regions with region-specific etching parameters. The conformal mask layer provides localized protection, and the blocking regions are strategically positioned to protect specific areas during their respective etching steps, ensuring each fin type achieves optimal dimensional precision.
3Productivity
If N-type and P-type fins are formed simultaneously, then manufacturing time is reduced, but material degradation occurs and critical dimension control is compromised
Solution Approach 1:
The patent segments the fin formation into sequential steps: first forming N-type fins while blocking P-type regions, then forming P-type fins while blocking N-type regions. This segmentation prevents material degradation by ensuring that etching chemistry and parameters are optimized for each fin type without interference from the other, maintaining material integrity while achieving acceptable manufacturing throughput.
Solution Approach 2:
The conformal mask layer serves as an intermediary protective element during the fin formation process. It is deposited conformally over the substrate and used in conjunction with blocking regions to protect specific areas during etching. This intermediary structure enables precise fin formation while preventing material degradation from excessive etching exposure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes material degradation and ensures that N-region and P-region fins have matching critical dimensions, enhancing circuit performance and yield by maintaining consistent vertical profiles, thus addressing the limitations of existing technologies in device scaling and parasitic capacitance.
Implementation Method 1
A conformal mask layer is deposited over the plurality of fins in the second region
Implementation Method 2
blocking a first region of a wafer and forming a plurality of fins in a second region of the wafer
Data Source
AI summary
A method for forming a semiconductor device includes blocking a first region of a wafer and forming a plurality of fins in a second region of the wafer. A protective conformal mask layer is deposited over the plurality of fins in the second region, the second region is blocked, and a plurality of fins are formed in the first region of the wafer using a variety of wet and/or dry etching procedures. The protective conformal mask layer protects the plurality of fins in the second region from the variety of wet and/or dry etching procedures that are used to form the plurality of fins in the first region.