Separate Source Regions in Memory Blocks for Uniform Speed

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Solution Overview

Problem

Existing memory devices face challenges in maintaining consistent performance due to variations in program and erase speed across a block of memory cells, primarily caused by the distance of NAND strings from the row decoder, leading to issues like wider threshold voltage distributions and reduced customizability.

Innovation Solution

The implementation of separate source regions in the substrate, each driven by respective voltage drivers, along with various contact configurations such as post-shaped and planar contacts, to provide uniform program and erase speeds and narrower threshold voltage distributions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single source region is used for the entire memory block, then the device complexity is reduced, but the program and erase speed uniformity across the block deteriorates

Engineering Contradiction:
Improvesource region configurationVSAvoidprogram and erase speed uniformity
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The memory block is divided into multiple segments, each with its own dedicated source region. This segmentation allows independent control of program and erase operations in different regions, ensuring uniform performance across the entire block while maintaining manageable device complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each source region is independently optimized and controlled to provide locally uniform program and erase speeds. The separate control of each source region allows tailored voltage application to specific areas, ensuring consistent performance characteristics throughout the memory block despite variations in distance from the row decoder.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If NAND strings far from the row decoder are used, then the memory block capacity is increased, but the threshold voltage distribution widens due to speed variations

Engineering Contradiction:
Improvememory block capacityVSAvoidthreshold voltage distribution
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

By segmenting the memory block into multiple regions with separate source regions, the patent enables independent optimization of threshold voltage control in each segment. This allows uniform programming characteristics even for NAND strings located far from the row decoder, maintaining narrow threshold voltage distributions across the entire expanded memory capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different voltage parameters to different source regions based on their location and characteristics. By adjusting voltage levels and pulse durations for each source region, the system compensates for distance-related variations, ensuring consistent threshold voltage programming and narrow distributions across the full memory block capacity.

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If separate source regions with respective voltage drivers are implemented, then the program and erase speed uniformity is improved, but the device complexity increases

Engineering Contradiction:
Improveprogram and erase speed uniformityVSAvoidvoltage driver configuration
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The control architecture is segmented into multiple independent voltage drivers, each responsible for a specific source region. This modular approach improves program and erase speed uniformity by allowing precise local control while keeping each driver's complexity manageable through functional decomposition.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each voltage driver is designed with multi-functionality to handle both program and erase operations for its associated source region. This universal design reduces overall device complexity by using standardized driver circuits that can perform multiple functions, rather than requiring separate specialized circuits for each operation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11361816B2Memory block with separately driven source regions to improve performance
Publication Date: 2022.06.14 SANDISK TECHNOLOGIES LLC
  • US11361816B2 patent drawing
  • US11361816B2 patent drawing
  • US11361816B2 patent drawing

AI summary

Apparatuses and techniques are described for providing separate source regions in the substrate below a block of memory cells. The source regions can be separately driven by respective voltage drivers to provide benefits such as more uniform program and erase speeds and narrower threshold voltage distributions. In one approach, a single source region is provided and divided into multiple source regions by etching trenches and filling the trenches with an insulating material. Contacts to the source regions can include post-shaped contacts which extend through the block for each source region. In another approach, one or more planar contacts extend through the block for each source region. In another aspect, a program operation applies different voltages to the respective source regions during a verify test of a program operation.