Separate Workfunction Layers for Integrated Circuit Contact Resistance
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Solution Overview
Problem
Conventional contact structures in integrated circuits with replacement metal gate technologies limit device performance due to high contact resistance and undesirable fringe capacitance, which affects operating speed and scalability.
Innovation Solution
The use of separate workfunction material layers in conjunction with raised source/drain structures, where one workfunction material layer is disposed along the sidewalls and another underneath the metal gate, reduces fringe capacitance by converting the raised source/drain region from a carrier accumulation to a carrier depletion region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional contact structures are used in replacement metal gate technologies, then the fabrication process is simpler, but contact resistance increases and device performance deteriorates
Solution Approach 1:
The workfunction material layer is segmented into two distinct parts: a first portion formed along the sidewalls of the metal gate electrode, and a second portion formed underneath the metal gate electrode. This segmentation allows each portion to serve different functions - the sidewall portion minimizes contact resistance while the underneath portion controls fringe capacitance, thereby improving overall device performance without requiring complex additional fabrication steps
Solution Approach 2:
Different regions of the workfunction material layer are given different spatial distributions and configurations. The first workfunction material is localized along the sidewalls where it directly contacts the source/drain regions to minimize contact resistance, while the second workfunction material is localized underneath the gate to control the electric field and reduce fringe capacitance. This local quality differentiation resolves the contradiction by optimizing each region for its specific function
2Speed
If raised source/drain structures are formed with conventional single-layer workfunction materials, then manufacturing is easier, but fringe capacitance increases and operating speed decreases
Solution Approach 1:
The workfunction material layer is divided into two functionally distinct segments: a first workfunction material layer deposited along the sidewalls of the metal gate electrode, and a second workfunction material layer deposited underneath the metal gate electrode. This segmentation enables the sidewall portion to minimize contact resistance while the underneath portion reduces fringe capacitance by controlling the electric field distribution, thereby increasing operating speed without requiring overly complex fabrication processes
Solution Approach 2:
The invention changes the spatial distribution parameter of the workfunction material by forming it in two distinct locations (sidewalls and underneath) rather than as a single continuous layer. This parameter change optimizes the electric field control and reduces fringe capacitance, leading to faster operating speeds while maintaining manufacturing feasibility through sequential deposition processes
3Area of stationary object
If minimum-sized contact holes are used, then area is minimized, but contact resistance cannot be minimized and cleaning becomes difficult
Solution Approach 1:
The raised source/drain structures serve a dual function: they provide the electrical connection path and simultaneously create their own enlarged contact surfaces. The upward protrusion of the source/drain regions naturally creates larger contact areas without requiring additional processing steps or larger contact holes, allowing minimum-sized contact holes to achieve minimum contact resistance through the self-formed enlarged contact surfaces
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances device performance by minimizing contact resistance and reducing fringe capacitance, leading to faster operating speeds and improved scalability in integrated circuits.
Implementation Method 1
forming a first workfunction material layer over the inter layer dielectric layer, along the sidewall spacer structures, and over the high-k material layer
Implementation Method 2
performing a tilted ion implant wherein ions are implanted at the masking layer over the inter layer dielectric layer and along the sidewall spacer structures
Implementation Method 3
selectively etching the masking layer and the first workfunction material from over the inter layer dielectric layer and from along the sidewall spacer structures
Data Source
AI summary
Integrated circuits employing replacement metal gate technologies with separate workfunction material layers and raised source/drain structures and methods for fabricating the same are disclosed herein. In one exemplary embodiment, a method of fabricating an integrated circuit includes forming a first workfunction material layer over an ILD layer, along the sidewall spacer structures, and over the high-k material layer. The method further includes forming a masking layer over the first workfunction material layer, performing a tilted ion implant wherein ions are implanted at the masking layer over the ILD layer and along the sidewall spacer structures, selectively etching the masking layer and the first workfunction material from over the ILD layer and from along the sidewall spacer structures, and forming a second workfunction material layer over the ILD layer, along the sidewall spacer structures, and over the first workfunction material layer.