Separated NOC Die Access for Programmable Logic Fabric Bandwidth
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Solution Overview
Problem
In programmable logic devices, incorporating a Network on Chip (NOC) within the fabric die limits its performance due to increased connectivity requirements and space constraints, making it difficult to facilitate efficient data communication between sectors across different fabric dies.
Innovation Solution
The NOC is embedded on a separate die that includes fabric support circuitry, allowing for data communication between sectors and increasing bandwidth, while maintaining the programmable logic fabric entirely on another die, thus resolving periphery shoreline bandwidth issues and enabling faster configuration and reconfiguration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the NOC is incorporated within the fabric die, then data communication between sectors is enabled, but the fabric die performance is limited due to increased connectivity requirements and space constraints
Solution Approach 1:
The patent divides the integrated circuit device into separate functional components: the fabric die containing programmable logic fabric and the separate die containing NOC circuitry. This segmentation allows each component to be optimized independently, resolving the contradiction by enabling data communication through the separate NOC die without compromising fabric die performance.
Solution Approach 2:
The NOC circuitry is extracted from the fabric die and placed on a separate die. This extraction removes the connectivity burden and space constraints from the fabric die, allowing it to maintain full performance while still enabling data communication through the dedicated NOC infrastructure.
2Productivity
If the NOC is embedded on a separate die, then bandwidth is increased and periphery shoreline bandwidth issues are resolved, but device complexity increases due to multi-dimensional die system
Solution Approach 1:
The patent transitions from a two-dimensional layout to a three-dimensional stacked architecture, placing the NOC circuitry on a separate die that is vertically stacked with the fabric die. This dimensional change increases bandwidth by providing dedicated communication pathways without consuming fabric die real estate, while the stacking approach manages complexity through standardized inter-die interfaces.
3Productivity
If the fabric die and NOC die are vertically stacked, then communication efficiency is enhanced and alternate pathways are provided, but manufacturing precision requirements increase
Solution Approach 1:
The patent introduces an intermediary layer or interface structure between the fabric die and NOC die that facilitates precise alignment and connection. This intermediary component mediates the manufacturing precision requirements by providing alignment features and standardized connection points, enabling efficient vertical stacking while managing the complexity of precise die-to-die alignment.
Data Source
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AI summary
An integrated circuit device may include programmable logic fabric disposed on a first integrated circuit die, such that the programmable logic fabric may include a first region of programmable logic fabric and a second region of programmable logic fabric. The first region of programmable logic fabric is configured to be programmed with a circuit design that operates on a first set of data. The integrated circuit may also include network on chip (NOC) circuitry disposed on a second integrated circuit die, such that the NOC circuitry is configured to communicate data between the first integrated circuit die and the second integrated circuit die.