SEPIC Controller Duty Cycle Adjustment for Voltage Stability

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Solution Overview

Problem

Single-ended primary inductance converters (SEPIC) face issues with overshoot or undershoot of output voltage when the operating frequency changes, particularly in automotive applications where dynamic response to input voltage changes is critical.

Innovation Solution

A controller system comprising two comparators, an oscillator, a ramp generator, a D flip-flop, an error amplifier, and a voltage reference source is used to generate a pulse width modulated signal that adjusts the duty cycle of the switch in the SEPIC, ensuring the product of cycle energy and operating frequency remains constant, thereby stabilizing the output voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the operating frequency is reduced to maintain DCM operation when input voltage decreases, then the SEPIC can maintain discontinuous conduction mode, but output voltage overshoot or undershoot occurs

Engineering Contradiction:
ImproveDCM operation stabilityVSAvoidoutput voltage stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies preliminary action by adjusting the duty cycle before the frequency change takes effect. When input voltage decreases, the controller proactively increases the duty cycle of the PWM signal to compensate for the upcoming frequency reduction, ensuring that the product of cycle energy and frequency remains constant and preventing output voltage overshoot or undershoot

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes multiple parameters simultaneously - both the duty cycle and the operating frequency are adjusted together. By changing the duty cycle in coordination with frequency changes, the system maintains constant power transfer and avoids output voltage instability that would occur with frequency changes alone

Inventive Principle:
Principle #35Parameter changes

2Speed

If the operating frequency is changed dynamically to respond to input voltage changes, then the dynamic response improves, but output voltage overshoot or undershoot occurs

Engineering Contradiction:
Improvedynamic response speedVSAvoidoutput voltage stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent uses feedback by continuously monitoring the input voltage and using an error amplifier to generate a PWM signal with adjusted duty cycle. The feedback loop detects input voltage changes and automatically compensates by adjusting the duty cycle to maintain constant output voltage, enabling fast dynamic response without overshoot or undershoot

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The controller performs preliminary adjustment of the duty cycle in response to detected input voltage changes, before the frequency change fully takes effect. This proactive compensation ensures smooth transitions and prevents output voltage instability during dynamic operation

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9985520B2Pulse width modulator for DC/DC converters
Publication Date: 2018.05.29 VITESCO TECHNOLOGIES USA LLC
  • US9985520B2 patent drawing
  • US9985520B2 patent drawing
  • US9985520B2 patent drawing

AI summary

A conventional single-ended, primary-inductance converter (SEPIC) has its switching frequency determined by a controller, which determines the duty cycle at which the switch operates by measuring differences between the SEPIC output voltage and a reference voltage. A controller is coupled to a switch of the SEPIC and provides a pulse train which determines the duty cycle and frequency at which the switch operates. The duty cycle is selectable between first and second percentages, the frequency is selectable between first and second frequencies, and the duty cycle and frequency are selected by the controller responsive to a voltage at an input voltage terminal of the SEPIC. Output voltage overshoot and undershoot are reduced.