Sequence Controller for Flexible Power Supply Booting
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Solution Overview
Problem
Conventional power management ICs (PMICs) face challenges in robustness, safety, and power saving, requiring drastic hardware design changes for booting sequence modifications, leading to lengthy design periods and mask modifications.
Innovation Solution
A sequence controller with a processor, non-programmable ROM, and programmable memory that allows flexible control of power supply sequences through parameter records, enabling changes in booting and stopping orders and delay times without modifying the non-programmable ROM, thus reducing design time and avoiding mask changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a general-purpose microcomputer is used to construct the PMIC, then design flexibility and adaptability are improved, but the system becomes less robust and fails to meet safety and power saving requirements
Solution Approach 1:
The PMIC is segmented into distinct functional modules: a dedicated sequencer for control functions, a microcomputer for programmability, and power supply circuits. This segmentation allows each component to be optimized for its specific function - the sequencer ensures robustness while the microcomputer provides adaptability.
Solution Approach 2:
A dedicated sequencer acts as an intermediary between the microcomputer and the power supply circuits. The sequencer receives commands from the microcomputer and executes them with deterministic timing, ensuring both the adaptability of the microcomputer and the reliability of power control are achieved.
2Reliability
If a dedicated sequencer is designed on a hardware-by-hardware basis to meet specifications, then robustness and safety are improved, but device complexity increases and design period becomes longer
Solution Approach 1:
The dedicated sequencer is designed as a universal controller that can handle multiple power supply circuits and various sequencing scenarios through a standardized interface and programmable instruction set, reducing the need for custom hardware designs for each application.
Solution Approach 2:
The sequencer's behavior is controlled through programmable parameters and instructions stored in memory, allowing different sequencing patterns to be achieved by changing software parameters rather than modifying hardware, thereby reducing design complexity.
3Adaptability or versatility
If hardware design changes are made to modify the booting sequence, then adaptability is improved, but manufacturing cost increases due to mask modifications and design period becomes longer
Solution Approach 1:
The booting sequence is made dynamic and reconfigurable through programmable memory structures. The sequencer can execute different sequences by loading different parameter sets from memory, allowing booting orders to be changed without any hardware modifications or mask changes.
Solution Approach 2:
Multiple booting sequences are stored as copies in the programmable memory, allowing the system to switch between different sequences by simply changing the active memory location rather than modifying the hardware design.
4Reliability
If the PMIC operates continuously to manage power supplies, then power management capability is maintained, but power consumption increases
Solution Approach 1:
The PMIC operates in periodic cycles rather than continuously. The microcomputer can enter low-power sleep modes between power management tasks, activating only when needed to monitor and control the power supply circuits, thereby reducing overall power consumption while maintaining management capability.
Solution Approach 2:
The dedicated sequencer autonomously manages the sequencing of power supplies without requiring continuous intervention from the microcomputer. This self-service capability allows the microcomputer to enter low-power states, reducing overall power consumption while maintaining reliable power management.
Data Source
AI summary
A sequence controller for controlling a sequence of booting and stopping a plurality of power supplies includes a processor and a non-programmable read only memory (ROM). A series of parameter records describing the sequence is stored in a programmable memory. Each of the parameter records is one of (i) a first record including a first parameter and a second parameter and associated with a first instruction for setting one of the plurality of power supplies corresponding to the first parameter to one state of an ON state and an OFF state corresponding to the second parameter and (ii) a second record including a third parameter and associated with a second instruction to wait for a time period corresponding to the third parameter.