Sequential Cell Error Sensing for Low-Voltage VLSI Operation

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Solution Overview

Problem

Existing VLSI designs are over-designed for the lowest rated voltage range, leading to inefficiencies in power consumption, as they do not account for potential operation at lower voltages, which can extend battery life in battery-operated systems.

Innovation Solution

A method to determine the lowest operating voltage at which a VLSI circuit fails by iteratively lowering the voltage during a boot sequence, monitoring sequential elements for failures, and adjusting the voltage to the margin where no errors occur, allowing for optimal low-power operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If VLSI devices are designed to operate at the lowest rated voltage with predetermined margin to guarantee correct operation, then reliability is improved, but power consumption increases and device complexity increases due to over-design

Engineering Contradiction:
Improvecorrect operation guaranteeVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the operating voltage adjustable rather than fixed. The system dynamically determines the actual lowest operating voltage through iterative testing and adjusts the voltage regulator accordingly, allowing the device to operate at optimized voltage levels rather than being constrained by conservative static design margins

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter from a fixed conservative value to a dynamically determined optimal value. By systematically varying the voltage during testing and identifying the lowest functional voltage, the system transforms the voltage parameter to achieve lower power consumption while maintaining reliability

Inventive Principle:
Principle #35Parameter changes

2Reliability

If VLSI devices are designed to operate at the lowest rated voltage with predetermined margin, then reliability is improved, but device complexity increases due to over-design

Engineering Contradiction:
Improvecorrect operation guaranteeVSAvoiddesign over-engineering
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system transitions from static conservative design to dynamic voltage optimization. By implementing a voltage determination process that tests and identifies the actual lowest operating voltage, the system eliminates unnecessary design margins and reduces device complexity while maintaining reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The device performs self-characterization by automatically determining its own lowest operating voltage through iterative testing. This self-service approach eliminates the need for external characterization and reduces design complexity by allowing the device to optimize its own operating parameters

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If VLSI devices are designed for the most stringent process variance range, then manufacturing precision is improved, but power consumption increases and device complexity increases due to over-design

Engineering Contradiction:
Improveprocess variance coverageVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the operating voltage parameter based on actual device characteristics rather than assuming the most stringent process conditions. By measuring the actual lowest operating voltage, the system adapts to the specific device's process variations and operates at optimized voltage levels, reducing power consumption without sacrificing manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10522237B2Low power VLSI designs using circuit failure in sequential cells as low voltage check for limit of operation
Publication Date: 2019.12.31 SIEMENS INDUSTRY SOFTWARE INC
  • US10522237B2 patent drawing
  • US10522237B2 patent drawing
  • US10522237B2 patent drawing

AI summary

Low power very large scale integrated (VLSI) designs using a circuit failure in sequential cells as low voltage check for limit of operation of a design are provided. One such method involves the adding a plurality of bits for sequential elements in the design including sets of flip-flops, RAMs, ROMs and register files to add parity or single error correct and double error detect mechanism, a method to detect the parity errors or a single bit error and a double bit error in the sequential elements, starting at a voltage of operation at a nominal value and gradually lowering voltage setting till a first error is detected in the sequential elements, increasing the voltage of operation by predetermined step above a voltage of first fail to achieve an optimal voltage setting of a correct operation of the design, storing this optimal voltage setting in anon-volatile memory for a subsequent use.