Memory Controller Sequential Dummy Pulses for Voltage Noise
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Solution Overview
Problem
Existing memory systems experience sudden changes in total current consumption by memory devices, leading to noise in the voltage source, which can disrupt operations and reduce efficiency.
Innovation Solution
A memory controller that applies a dummy pulse sequentially to channels coupled to memory devices to manage current consumption, generating a clock signal at an initial frequency lower than normal to prevent sudden changes, and uses modulation operations to improve read data efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory devices are activated simultaneously at normal frequency, then operation speed is improved, but current consumption changes suddenly causing voltage noise
Solution Approach 1:
The memory controller applies dummy pulses to memory devices before activating them for normal operations. This preliminary action gradually increases current consumption from a low initial state to the normal operating state, preventing sudden current changes and voltage noise while allowing devices to be activated in sequence rather than simultaneously
Solution Approach 2:
The memory controller uses periodic dummy pulses with controlled frequency and duration to gradually ramp up current consumption. The dummy pulses are applied in a time-dependent manner, creating a smooth transition from initial to normal operating frequency, which prevents harmful voltage noise while maintaining operational speed
2Productivity
If dummy pulses are applied to all channels simultaneously, then current consumption increases faster, but voltage noise increases due to sudden current change
Solution Approach 1:
The memory controller divides the dummy pulse application into separate segments for different channels. Each channel receives dummy pulses independently and sequentially rather than all channels simultaneously, which allows current to increase at a controlled rate while preventing sudden total current changes that cause voltage noise
Solution Approach 2:
The memory controller dynamically adjusts the timing and application of dummy pulses based on channel status and current consumption levels. The system transitions from a static simultaneous activation approach to a dynamic sequential approach, optimizing the balance between productivity and noise prevention
Data Source
AI summary
A memory controller may include: a request checker identifying memory devices corresponding to requests received from a host among the plurality of memory devices and generating device information on the identified memory devices to perform operations corresponding to the requests; a dummy manager outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse. A memory controller may include an idle time monitor outputting an idle time interval of the memory device and a clock signal generator generating a clock signal based on the idle time interval and outputting the clock signal to the memory device through the channel to perform a current operation.