Sequential Gate Charging Power Stage

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Solution Overview

Problem

Dual-NMOS power stages with integrated charge pumps face inefficiencies in high-side switching due to low power efficiency beyond a certain voltage threshold, leading to increased power losses and reduced system reliability compared to bootstrap power stages.

Innovation Solution

Implementing a sequential switching method for power transistors using multiple voltage domains, where the gate is charged in phases using output voltage, power supply voltage, and charge pump voltage, with dedicated high- and low-detectors to optimize switching phases and reduce power requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a charge pump is used to accumulate full gate charge QG, then the power stage can achieve full gate charging capability, but power efficiency becomes low beyond VDD/VGS threshold

Engineering Contradiction:
Improvegate charging capabilityVSAvoidpower efficiency
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The gate charging process is divided into multiple phases: first charging the gate to VDD/VGS threshold using efficient power supply, then using charge pump only for the remaining voltage portion. This segmentation allows each charging stage to use the most efficient method appropriate for its voltage range, resolving the contradiction between achieving full gate charge and maintaining power efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the charging voltage parameter dynamically by using different voltage sources at different charging stages. Initially using VDD/VGS from the power supply, then transitioning to charge pump voltage only for the excess portion, thereby optimizing power efficiency while achieving the required gate charge accumulation.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If sequential switching method is used to decrease high-side switching losses, then power efficiency increases, but device complexity increases due to multiple voltage domains and detectors

Engineering Contradiction:
Improvehigh-side switching lossesVSAvoidmultiple voltage domains and detectors
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The gate driver circuit automatically detects the gate voltage level and switches between charging phases without external intervention. The high detector and low detector work autonomously to monitor voltage thresholds and control the switching between power supply charging and charge pump charging, reducing the need for complex external control circuitry while maintaining sequential switching benefits.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10707840B2Power stage with sequential power transistor gate charging
Publication Date: 2020.07.07 INFINEON TECHNOLOGIES AG
  • US10707840B2 patent drawing
  • US10707840B2 patent drawing
  • US10707840B2 patent drawing

AI summary

A power stage having a power transistor coupled between a power supply and a switching node; a charge pump coupled between the power supply and a gate of the power transistor; and a gate driver configured to charge the gate of the power transistor until the gate voltage reaches a predefined voltage, and further charge the gate of the power transistor from the charge pump.