Sequential Memory Access Pre-Pulse Charge Removal
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Solution Overview
Problem
Existing nonvolatile memory systems face inefficiencies in sequential access modes due to boosting charges on unselected strings, which can lead to hot carrier injection and read disturbance, affecting performance and reliability.
Innovation Solution
The implementation of a pre-pulse method that applies a predetermined voltage to unselected string selection lines or ground selection transistors to remove boosting charges, optimizing the read operation by deciding whether to apply a pulse based on mode information stored in a register, thereby improving access speed and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a pre-pulse is applied to unselected string selection lines to remove boosting charges, then reliability is improved by reducing hot carrier injection and read disturbance, but device complexity increases due to additional control logic and pulse application circuitry
Solution Approach 1:
A pre-pulse voltage is applied to unselected string selection lines before the actual read operation to remove boosting charges that would otherwise cause hot carrier injection and read disturbance. This preliminary action prevents the harmful effects before they can occur during the main read operation.
Solution Approach 2:
The voltage level of string selection lines is dynamically changed based on the read operation type. For sequential read operations, a pre-pulse voltage level is applied to unselected strings, while for random read operations, the conventional voltage level is maintained. This parameter change optimizes reliability for sequential access while avoiding unnecessary complexity for random access.
2Speed
If sequential read mode is implemented with pre-pulse to unselected strings, then access speed is improved for sequential operations, but energy consumption increases due to additional pre-pulse voltage application
Solution Approach 1:
The pre-pulse is applied only during sequential read operations where it provides significant performance benefit, rather than being continuously applied. This timing-specific application optimizes the speed advantage where needed while limiting energy consumption to only when beneficial.
Solution Approach 2:
The pre-pulse voltage is applied partially - only to unselected strings during sequential read operations - rather than to all strings continuously. This partial application provides the necessary speed optimization for sequential access while avoiding excessive energy consumption that would result from universal continuous application.
3Adaptability or versatility
If mode information is stored in a register to control pre-pulse application, then adaptability is improved for different read modes, but device complexity increases due to register and control logic
Solution Approach 1:
The string selection line control circuit is designed to perform multiple functions: it can apply pre-pulse voltages for sequential read operations, apply conventional voltages for random read operations, and respond to different read command types. This multi-functionality provides adaptability across different access modes without requiring completely separate control circuits for each mode.
Solution Approach 2:
The control logic changes the voltage parameter of string selection lines based on the detected read mode. A register stores mode information that determines whether sequential or random access is being performed, and the control logic adjusts the selection line voltages accordingly. This parameter-based adaptation provides versatility while using simple binary control logic.
Data Source
AI summary
Systems and methods of sequentially accessing memory cells in a nonvolatile memory device (NVM) are provided. The NVM has a plurality of strings and a common signal line coupled to the plurality of strings. Each string includes a plurality of memory cells and a selection transistor coupled between the plurality of memory cells and the common signal line. A command that accesses multiple memory cells is received, a voltage is applied to a first selection transistor of a first string to electrically connect the common signal line to the first string, a pulse is applied for a predetermined time period to selection transistors of other strings, and memory cells of the first string are accessed. Advantages such as removal of boosting charges from unselected strings prior to sequentially accessing memory cells from selected strings can improve performance and reliability of NVM-based systems.