Sequential Power MOSFET Driver for Leakage Reduction
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Solution Overview
Problem
Power MOSFET devices face performance degradation when operating near or above their maximum operating voltage, leading to increased leakage currents and resistance degradation, which complicates the selection and dimensioning of MOS devices for various circuit applications, particularly in high-power conditions.
Innovation Solution
A power MOS stage comprising multiple MOS devices connected in parallel, with different voltage ratings, where the driver circuit controls the sequential actuation and deactuation of these devices to minimize exposure to high voltage stress, thereby protecting lower voltage MOS devices from aging degradation while ensuring operation within safe voltage ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a power MOS with lower voltage rating is used to reduce silicon area and power dissipation, then Rdson performance and area are improved, but the device suffers from performance degradation and increased leakage when operating near or above MOV
Solution Approach 1:
The power MOS stage is segmented into multiple parallel MOS devices with different voltage ratings. A first MOS device with lower voltage rating (better Rdson) is operated in conjunction with a second MOS device with higher voltage rating (better protection margin). This segmentation allows each device to operate in its optimal range, resolving the contradiction between area optimization and reliability.
Solution Approach 2:
The invention changes the voltage rating parameter by introducing multiple MOS devices with different voltage ratings into the power stage. By selecting devices with specific voltage ratings and controlling their operation, the system achieves both area efficiency and performance stability without requiring a single oversized device.
2Reliability
If a power MOS with higher voltage rating is used to ensure operation below MOV, then reliability is improved, but silicon area and driver power dissipation increase due to larger device size
Solution Approach 1:
Instead of using a single high-voltage MOS device that would require large area, the invention segments the power stage into multiple parallel devices with different voltage ratings. This allows the system to achieve the required voltage handling capability without proportionally increasing the total silicon area, as lower-voltage devices can be used in parallel.
Solution Approach 2:
The invention introduces dynamic control of multiple MOS devices with different voltage ratings. The driver circuit can selectively activate or deactivate specific devices based on operating conditions, allowing the system to optimize between area efficiency and reliability dynamically rather than being constrained by a fixed device configuration.
3Power
If a power MOS operates above MOV but below AMR, then the device can handle higher voltages, but leakage currents increase and resistance degrades over time
Solution Approach 1:
The higher-voltage-rated MOS device acts as an intermediary protective element for the lower-voltage-rated device. When operating near or above the MOV of the first device, the second device with higher voltage rating absorbs the excess voltage stress, preventing harmful effects like increased leakage and resistance degradation in the primary power device.
Solution Approach 2:
The second MOS device with higher voltage rating serves as a pre-positioned protective cushion against voltage spikes or transient conditions that could push the first device beyond its MOV. This beforehand cushioning prevents performance degradation before it occurs, rather than attempting to correct it afterward.
Data Source
AI summary
A power MOS stage includes a first power MOS device and a second power MOS devices connected in parallel between a first node and a second node, the first power MOS device having a first voltage rating and the second power MOS device having a second voltage rating that is lower than the first voltage rating. A driver circuit is configured to drive control nodes of the first and second power MOS devices in a sequential manner when actuating the power MOS stage by actuating the first power MOS device before actuating the second power MOS device. The control nodes of the first and second power MOS devices are further driven in a sequential manner when deactuating the power MOS stage by deactuating the second power MOS device before deactuating the first power MOS device.