Sequential Transistor Control for Balanced Power Loss
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Solution Overview
Problem
Existing load driving systems with parallel-connected transistors face challenges in symmetrically dividing driver currents and preventing excessive current flow, leading to power loss and potential transistor destruction.
Innovation Solution
A device that cyclically and sequentially activates and deactivates transistors, ensuring equal average power loss across all transistors, with a control device managing the actuation units to maintain balanced current distribution and prevent excessive current in any branch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple transistors are connected in parallel to handle high power losses, then the power handling capability is improved, but the current distribution becomes unbalanced leading to excessive current in individual branches
Solution Approach 1:
The patent applies periodic action by cyclically and sequentially activating transistors in a predetermined temporal sequence. Each transistor is activated for a specific time interval and then deactivated in favor of the next transistor in the sequence. This periodic switching ensures that each transistor handles a proportional share of the total power loss over time, preventing any single transistor from bearing excessive current while maintaining the overall power handling capability of the parallel configuration.
2Power
If transistors are activated simultaneously in parallel, then the power handling capability is improved, but the control complexity increases to ensure symmetric current division
Solution Approach 1:
The patent applies segmentation by dividing the simultaneous operation of parallel transistors into sequential time segments. Instead of controlling all transistors simultaneously with complex balancing circuits, the control device segments the operation into distinct time intervals where each transistor is activated individually in sequence. This temporal segmentation simplifies the control architecture by eliminating the need for complex symmetric current division circuits while maintaining effective power handling through cyclic activation of all transistors.
Data Source
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AI summary
The load driving device has two control units (A1,A2) for generating control signals for controlling transistors (T1,T2). Each transistor is assigned a control unit (18,20). A control device (22) is provided for sequential release of the control of the transistors by the control unit. The control unit is assigned to the controlled transistor for similar length of control interval within a cycle.