SerDes Crosstalk Mitigation via Phase-Adjusted Clock Signals

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Solution Overview

Problem

As switching speeds increase in SerDes devices, crosstalk interference worsens, affecting the functionality of SerDes receivers, particularly when transmitters switch simultaneously and in phase, leading to ground bounce and increased Bit Error Rates (BERs).

Innovation Solution

Incorporating phase-adjustment devices that receive a reference clock signal, generate a phase-adjusted clock signal out of phase with the reference signal, and deliver it to SerDes devices to ensure they switch out of phase, thereby mitigating crosstalk among SerDes devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If switching speeds in SerDes devices are increased to improve data transmission rate, then productivity is improved, but crosstalk interference worsens affecting receiver functionality

Engineering Contradiction:
Improvedata transmission rateVSAvoidcrosstalk interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by introducing phase-adjustment devices that proactively shift clock signals to different phases before the SerDes devices switch. This pre-established phase difference prevents simultaneous switching of multiple transmitters, thereby preemptively eliminating the crosstalk interference that would otherwise occur at high switching speeds.

Inventive Principle:
Principle #9Preliminary anti-action

2Productivity

If multiple SerDes transmitters switch simultaneously to increase throughput, then productivity is improved, but ground bounce and Bit Error Rates increase

Engineering Contradiction:
ImprovethroughputVSAvoidBit Error Rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements periodic action by using phase-adjustment devices to systematically vary the switching timing of different SerDes transmitters. Each transmitter operates periodically but with a phase offset from others, ensuring that switching events are distributed over time rather than occurring simultaneously, thus maintaining throughput while reducing ground bounce and Bit Error Rates.

Inventive Principle:
Principle #19Periodic action

3Device complexity

If SerDes devices are placed closer together to reduce routing channel lengths, then device complexity is reduced, but crosstalk interference increases

Engineering Contradiction:
Improverouting channel lengthVSAvoidcrosstalk interference
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces phase-adjustment devices as intermediaries between the clock source and SerDes devices. These intermediary components modify the clock signals to create phase differences, acting as a mediator that enables close placement of SerDes devices without suffering from crosstalk, since the phase-shifted switching prevents simultaneous electromagnetic interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10348482B1Apparatus, system, and method for mitigating crosstalk among SerDes devices
Publication Date: 2019.07.09 JUNIPER NETWORKS INC
  • US10348482B1 patent drawing
  • US10348482B1 patent drawing
  • US10348482B1 patent drawing

AI summary

The disclosed apparatus may include (1) a plurality of SerDes devices that each facilitate transmitting and receiving communications in connection with a network device and (2) at least one phase-adjustment device communicatively coupled to a first SerDes device included in the SerDes devices, wherein the phase-adjustment device mitigates crosstalk among the SerDes devices by (A) receiving at least one reference clock signal, (B) generating at least one phase-adjusted clock signal based at least in part on the reference clock signal such that the phase-adjusted clock signal and the reference clock signal are out of phase with respect to one another, and (C) delivering the phase-adjusted clock signal to the first SerDes device to ensure that the SerDes devices are switching out of phase with respect to one another. Various other apparatuses, systems and methods are also disclosed.