SERDES On-Chip Delay Measurement Using Special Character Counting
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Solution Overview
Problem
Existing methods for measuring data propagation delay in serializer/deserializer (SERDES) integrated circuits are inaccurate due to differences in data rates and formats between parallel and serial domains, and the presence of multiple clock domains, leading to incomplete and ambiguous measurements.
Innovation Solution
A system and method using a start/stop counter to detect special characters at the input and output of the SERDES data path, counting clock cycles to calculate data propagation delay, with identical circuitry and synchronized trigger signals to ensure accuracy across both domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional delay measurement methods are used in SERDES systems, then the measurement process is simple, but the measurement precision is low due to differences in data rates and formats between parallel and serial domains
Solution Approach 1:
The patent introduces a delay measurement circuit as an intermediary component that includes parallel-to-serial and serial-to-parallel conversion circuits. This intermediary handles the complex domain conversions internally, allowing accurate delay measurement without requiring the external measurement system to manage the complexity of multi-domain signal transformations.
Solution Approach 2:
The patent replaces traditional external delay measurement equipment with an on-chip delay measurement circuit that uses digital signal processing and clock cycle counting. This substitution integrates the measurement functionality directly into the SERDES chip, improving precision while the self-contained nature manages the complexity internally.
2Measurement precision
If external delay measurement equipment is used, then measurement coverage is broad, but the measurement precision is insufficient due to inability to account for all delay components
Solution Approach 1:
The patent merges the delay measurement functionality with the existing SERDES chip structure by integrating parallel-to-serial and serial-to-parallel conversion circuits within the same chip. This combination allows the measurement circuit to capture all delay components (parallel input delay, serial transmission delay, and parallel output delay) in a unified measurement process, achieving complete and precise delay characterization.
3Measurement precision
If loop-back mode is used for measurement, then the measurement process is simplified, but the measurement precision is compromised due to inability to measure one-way delay
Solution Approach 1:
The patent introduces a delay measurement circuit as an intermediary that includes separate detection paths for input and output signals. This intermediary structure enables the circuit to detect and compare input and output signal timings independently, allowing accurate one-way delay measurement without requiring external equipment or complex loop-back configurations.
Data Source
AI summary
A system and method is provided for making highly accurate data propagation delay measurements in a serializer/deserializer (SERDES) integrated circuit. The invention detects a selected special character when the special character is present at the input of a transmit data path of the SERDES integrated circuit. The invention also detects the special character when the special character appears at the output of the transmit data path. The invention then counts the number of clock cycles during which the selected character was in the transmit data path. This provides the data propagation delay of the special character through the transmit data path. The invention also makes data propagation delay measurements for a receive data path of a SERDES integrated circuit.