Dual-Mode SerDes Driver Impedance and Equalization Switching
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Solution Overview
Problem
Current Serializer/Deserializer (SerDes) systems for high-speed communication between electronic devices or chips are limited by the inability to seamlessly switch between voltage-mode logic (VML) and low-voltage differential signaling (LVDS) modes, which restricts power efficiency and equalization capabilities.
Innovation Solution
A driving system that incorporates a first and second resistance adjusting circuit, a divider, and a controller to adjust output impedance and equalization amplitude, allowing operation in both VML and LVDS modes by selectively coupling drivers to these circuits, enabling switching between modes to optimize power usage and equalization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a driver supports only one mode (VML or LVDS), then the driver structure is simple and easy to manufacture, but the adaptability to different operation modes is poor
Solution Approach 1:
The driver is designed to support both VML and LVDS modes through a unified structure. The driver includes output terminals that can be selectively coupled to different resistance adjusting circuits (first for VML mode, second for LVDS mode) based on the selected operation mode, enabling one driver to perform multiple functions without requiring separate dedicated drivers for each mode
Solution Approach 2:
The driver incorporates dynamic switching capability where the coupling between output terminals and resistance adjusting circuits can be changed based on the selected mode. This dynamic reconfiguration allows the driver to adapt its impedance characteristics and equalization behavior according to whether VML or LVDS mode is active, transforming a static single-mode driver into a dynamic multi-mode driver
2Use of energy by moving object
If VML mode is used, then power consumption is reduced and supply voltage can be low, but equalization control capability is limited
Solution Approach 1:
The system introduces resistance adjusting circuits as intermediary elements between the driver output terminals and the transmission line. These circuits act as mediators that can be selectively activated (first resistance adjusting circuit for VML mode, second for LVDS mode) to provide equalization control capability while maintaining the power efficiency benefits of VML mode when needed
3Reliability
If LVDS mode is used, then equalization control is easy and current stability is improved, but power consumption increases and power supply sensitivity arises
Solution Approach 1:
The driver incorporates dynamic mode switching capability where the coupling between output terminals and resistance adjusting circuits can be changed based on operational requirements. This allows the system to dynamically select LVDS mode when current stability and equalization control are prioritized, and switch to VML mode when power consumption needs to be minimized
Data Source
AI summary
The present invention provides a driving system operating in a first or second modes. The driving system includes first and second resistance adjusting circuits, a divider, a controller and a driver. The divider divides a second resistance adjusting signal generated by the second resistance adjusting circuit by a standard value to generate a first control signal. The controller receives the first control signal and generates a second control signal. When the driving system operates in the first mode, the driver receives the second control signal, according to the second control signal, the driver adjusts an output impedance of itself and adjusts equalization amplitude of a first differential output signal generated by itself. When the driving system operates in the second mode, the driver generates a second differential output signal and adjusts the output impedance according to a first resistance adjusting signal generated by the first resistance adjusting circuit.