SERDES Eye Scanning Circuit Separated from DFE Equalizer

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Solution Overview

Problem

Existing methods for evaluating the performance of serializer/deserializer (SERDES) systems, particularly those with decision feedback equalizers (DFE), are inadequate as they interfere with the equalizer's operation, leading to inaccurate performance assessment due to voltage offset and clock signal phase adjustments.

Innovation Solution

A circuit and method that separate the eye scanning circuitry from the equalizer, allowing measurement of data eye dimensions without affecting the equalizer's operation, thereby enabling accurate performance evaluation of SERDES systems, including those with DFEs, with minimal architectural changes or additional hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If voltage offset and clock signal phase adjustments are made to scan the data eye, then the data eye boundaries can be measured, but the equalizer operation is interfered with and performance assessment becomes inaccurate

Engineering Contradiction:
Improvedata eye boundary measurementVSAvoidequalizer operation accuracy
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent segments the evaluation function from the equalizer operation by introducing a separate evaluation mode that operates independently. The evaluation circuitry is activated separately from the normal equalizer operation, allowing data eye scanning without interfering with the equalizer's decision feedback mechanism. This segmentation enables simultaneous measurement of data eye boundaries while maintaining accurate equalizer performance assessment.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the SERDES is equipped with a DFE equalizer, then channel dispersion can be corrected, but existing evaluation techniques become inapplicable due to the equalizer's decision feedback mechanism

Engineering Contradiction:
Improvechannel dispersion correctionVSAvoidevaluation technique compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces an intermediary evaluation circuitry that acts as a mediator between the DFE equalizer and the measurement process. This intermediary structure allows the data eye to be scanned and measured without the measurement process feeding back into or interfering with the equalizer's decision feedback loop. The evaluation circuitry captures data eye characteristics independently, making the evaluation technique compatible with DFE-based systems while preserving the equalizer's dispersion correction capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the postcursor equalizer uses past decisions to cancel postcursor ISI, then channel imperfections can be corrected, but varying offset voltage and clock phase confuses the equalizer and degrades subsequent symbols

Engineering Contradiction:
Improvepostcursor ISI cancellationVSAvoidsymbol decision accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent extracts the evaluation function from the equalizer operation path. By using a separate evaluation circuitry that does not depend on the equalizer's decision feedback, the measurement process can vary offset voltage and clock phase without confusing the equalizer. The evaluation circuitry independently captures data eye dimensions at different sampling points, allowing accurate measurement without degrading the equalizer's ability to cancel postcursor ISI using past decisions.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7782932B2Circuit and method for evaluating the performance of an adaptive decision feedback equalizer-based serializer deserializer and serdes incorporating the same
Publication Date: 2010.08.24 TEXAS INSTRUMENTS INC
  • US7782932B2 patent drawing
  • US7782932B2 patent drawing
  • US7782932B2 patent drawing

AI summary

A circuit and method for evaluating serializer deserializer (SERDES) performance that is particularly advantageous when the SERDES has a decision feedback equalizer (DFE). In one embodiment, the circuit has a data processing path and an operational feedback loop coupled to said data processing path and containing an equalizer, perhaps a DFE. In that embodiment, the circuit includes an eye scanning circuit coupled to said data processing path but separate from said equalizer and configured to measure at least one dimension of an eye relative to which said equalizer is configured for operation without substantially affecting said operation.