SerDes Level Finder Circuit for Adaptive DFE Threshold Tracking
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Solution Overview
Problem
Existing digital communication systems face challenges in effectively combating inter-symbol interference (ISI) and noise, particularly in high-data-rate applications, where current equalization techniques often balance complexity and power requirements without achieving optimal performance.
Innovation Solution
A low-complexity level finder circuit and method that employs a gated comparator and asymmetric accumulator to adaptively determine thresholds, enabling concurrent processing and improved channel characterization, specifically designed for use in decision feedback equalizers (DFE) to enhance symbol decision-making and reduce error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decision feedback equalizers and adaptive equalization techniques are employed to combat ISI and noise, then error rates are reduced and channel characterization is improved, but device complexity and power requirements increase
Solution Approach 1:
The level finder is divided into specialized functional blocks: a gated comparator that asserts signals based on threshold conditions, and an asymmetric accumulator that performs adaptive threshold adjustment. This segmentation allows each block to perform a specific function efficiently, reducing overall complexity while maintaining effectiveness in combating ISI and noise
Solution Approach 2:
The level finder circuit serves multiple functions: it performs channel characterization, determines optimal decision thresholds, and adapts to varying channel conditions. By integrating these functions into a single low-complexity circuit, the invention avoids the need for multiple separate complex systems, thereby reducing device complexity while improving reliability
2Reliability
If complex equalization and demodulation techniques with channel characterization are implemented, then performance in challenging conditions is enhanced, but areal and power requirements increase
Solution Approach 1:
The asymmetric accumulator automatically adapts thresholds based on signal assertions without requiring external control or complex processing. The circuit self-adjusts to channel conditions through its inherent feedback mechanism, eliminating the need for power-hungry external control systems while maintaining enhanced performance in challenging conditions
Data Source
AI summary
An illustrative receiver includes: a decision element that derives symbol decisions from a slicer input signal; an equalizer that converts a receive signal into the slicer input signal; a summer that combines the symbol decisions with the slicer input signal to produce an error signal; and a level finder that operates on said signals to determine thresholds at which each signal has a given probability of exceeding the threshold. One illustrative level finder circuit includes: a gated comparator and an asymmetric accumulator. The gated comparator asserts a first or a second gated output signal to indicate when an input signal exceeds or falls below a threshold with a programmable condition being met. The asymmetric accumulator adapts the threshold using up steps for assertions of the first gated output signal and down steps for assertions of the second gated output signal, with the up-step size being different than the down-step size.