SERDES Oversampling via Data Eye Path Coupling

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Solution Overview

Problem

Increasing oversampling line rates in serializer-deserializer (SERDES) systems without significantly adding circuit resources or complexity is challenging, especially as demand for higher line and oversampling rates grows, leading to increased costs and complexity.

Innovation Solution

The solution involves coupling a data eye path of one SERDES to the data path of another SERDES, allowing for effective oversampling with a clock frequency that is a fraction of the actual oversampling rate, and using a multiplexer to route parallel data between the two SERDES, which reduces the complexity and cost by maintaining a one-to-one ratio of output SERDES FIFOs to FPGA interfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If oversampling line rate is increased, then data throughput is improved, but circuit resources and complexity increase

Engineering Contradiction:
Improveoversampling line rateVSAvoidcircuit resources
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the data eye path of a first SERDES with the data path of a second SERDES, allowing the first SERDES to provide oversampled data through the second SERDES output interface. This combination enables doubled throughput without proportionally increasing circuit resources, as shared components serve multiple functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The second SERDES data path and output interface serve dual purposes: handling native second SERDES data and transmitting oversampled data from the first SERDES. This multi-functionality reduces the need for dedicated separate paths for each SERDES, thereby reducing overall circuit complexity while maintaining high throughput capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If oversampling clock frequency is increased, then oversampling rate is improved, but power consumption and circuit stress increase

Engineering Contradiction:
Improveoversampling rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The system uses periodic sampling at a lower clock frequency by leveraging the data eye path, which is designed for eye diagram measurements and timing analysis. This periodic action at reduced frequency achieves the same oversampling effect without the continuous high-frequency operation that would consume excessive power.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The data eye path acts as an intermediary mechanism that enables oversampling at lower frequencies. By using this intermediate path specifically for oversampling operations rather than the main data path, the system achieves high oversampling rates without subjecting the entire circuit to high-frequency stress and power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If additional SERDES interfaces are added, then data throughput is improved, but device complexity and cost increase

Engineering Contradiction:
Improvedata throughputVSAvoidinterface count
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines the output capabilities of two SERDES into a single effective interface by routing the first SERDES oversampled data through the second SERDES data path. This merging allows doubled throughput while maintaining a one-to-one ratio of SERDES to output interfaces, avoiding the need for additional physical interfaces.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The second SERDES output interface serves as a universal output for both the second SERDES native data and the first SERDES oversampled data. This multi-functional interface eliminates the need for separate dedicated outputs for each SERDES, reducing the total interface count while maintaining full throughput capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3066667B1Serdes receiver oversampling rate
Publication Date: 2017.12.20 XILINX INC
  • EP3066667B1 patent drawingFigure 1
  • EP3066667B1 patent drawingFigure 2
  • EP3066667B1 patent drawingFigure 3

AI summary

An apparatus relates generally to serializer-deserializers. In such an apparatus, a first serializer-deserializer has a first data path and a data eye path. The first data path is coupled to a first data out interface of the first serializer-deserializer. A second serializer-deserializer has a second data path. The second data path is coupled to a second data out interface of the second serializer-deserializer. The data eye path of the first serializer-deserializer is coupled to the second data path of the second serializer-deserializer.