SerDes Regulator Dummy Current Stabilization
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Solution Overview
Problem
In serializer/deserializer (SerDes) circuits, the rapid increase in load current due to high-speed clock signal distribution leads to a significant drop in regulator voltage, compromising signal synchronization and requiring additional stabilization circuits that increase circuit area.
Innovation Solution
A regulator with a voltage control circuit, a clock signal output circuit, and a current control circuit that manages a dummy current to stabilize the voltage, preventing voltage drops during synchronization by controlling the current flow based on the voltage supplied.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a stabilization circuit is placed to stabilize the voltage, then the voltage stability is improved, but the circuit area increases
Solution Approach 1:
The patent applies preliminary action by controlling the clock signal output timing to coincide with the synchronization signal assertion. The voltage control circuit is configured to output the clock signal at the moment when the synchronization signal is asserted, which is when the load current increases. This timing coordination allows the regulator to maintain voltage stability without requiring additional stabilization circuits, as the voltage control is integrated into the existing clock signal output mechanism rather than adding separate stabilization components
2Measurement precision
If the high-speed clock signal is transmitted to synchronize transmitters, then the synchronization accuracy is improved, but the load current increases rapidly causing voltage drop
Solution Approach 1:
The patent implements feedback by using the synchronization signal itself as a trigger for the voltage control circuit. The voltage control circuit monitors the synchronization signal assertion and automatically adjusts the clock signal output timing and power supply to the PLL circuit accordingly. This feedback mechanism ensures that the voltage remains stable during the high-current period when synchronization is asserted, maintaining both synchronization accuracy and voltage stability without requiring external stabilization circuits
Data Source
AI summary
According to an embodiment, a regulator includes: a voltage control circuit to supply a voltage; a clock signal output circuit to output a clock signal controlled by the voltage supplied from the voltage control circuit; and a current control circuit to supply the voltage supplied from the voltage control circuit to the clock signal output circuit, the current control circuit make to flow a dummy current which is determined based on the voltage, and stopping flowing the dummy current at a timing when the clock signal output circuit outputs the clock signal.