SerDes Fast Retrain Upon Power Saving Mode Exit

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Solution Overview

Problem

High-speed parallel data transmission in computing systems leads to increased power consumption due to wide communication buses, which results in higher noise effects and latency during power management, as the initialization and configuration of SERDES circuits consume significant time and resources.

Innovation Solution

The system configures and stores time-invariant and time-variant parameters for serialized data transmission lanes, allowing for rapid reconfiguration during power up or awakening, reducing the delay in data transport by using stored parameters as initial values for the configuration algorithms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If SERDES circuits are powered down to reduce power consumption, then power saving is improved, but the initialization and configuration time increases significantly when powered back up

Engineering Contradiction:
Improvepower consumptionVSAvoidinitialization and configuration time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent applies preliminary action by storing the trained parameter sets in a buffer memory before power down occurs. When the SERDES circuit is powered back up, these pre-stored parameters are immediately loaded and used as initial values, avoiding the need to re-train from scratch. This resolves the contradiction by preparing the necessary data in advance, thus reducing the time penalty associated with power cycle recovery while maintaining the power savings benefit.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If wide communication buses are used to increase throughput, then data transmission speed is improved, but power consumption and noise effects increase

Engineering Contradiction:
Improvedata transmission throughputVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies segmentation by dividing the wide parallel bus into multiple narrower serial lanes. Instead of using a single wide bus that consumes high power, the data is split across multiple serial channels that operate at lower individual power levels. This resolves the contradiction by maintaining overall throughput through parallel serial lanes while reducing the power consumption and noise associated with any single wide bus operation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9052900B2Serdes fast retrain method upon exiting power saving mode
Publication Date: 2015.06.09 ORACLE INT CORP
  • US9052900B2 patent drawing
  • US9052900B2 patent drawing
  • US9052900B2 patent drawing

AI summary

Systems and methods for reducing power consumption of systems using serialized data transmission. In a multi-node system, the reiterative steps for the setup of the lanes within links between the nodes produces both a time invariant set of parameters associated with the channel properties of the lanes and a time variant set of parameters associated with receiver clock alignment. The time invariant set is stored in persistent storage. Links may be turned on and turned off. When a link is turned on again, the stored time invariant set may be used as initial values to reconfigure both the time invariant and the time variant sets, thereby greatly reducing the delay to begin using the link again. The reduced delay may significantly speed up the wakening process for the links, thereby encouraging the use of low-power techniques that include tuning off lanes.