SerDes RxLOS Offset Calibration Circuit Design
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Solution Overview
Problem
Existing serializer/deserializer (SerDes) receiver devices face challenges in accurately calibrating the offset error in the Receiver Loss of Signal (RxLOS) signal due to active glitches and inter-symbol interference, which can lead to erroneous signal detection, and conventional offset calibration methods are inefficient and costly.
Innovation Solution
A method and circuit design that switches the RxLOS circuit from operating mode to offset calibration mode, using a single control switch to short the differential output signal and generate a common mode voltage, allowing for calibration of all stages of the peak detector cell, thereby improving signal offset calibration while reducing circuit size and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional offset calibration methods are used to calibrate all stages of the peak detector cell, then measurement precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the calibration functions for all three stages of the peak detector cell into a single unified calibration circuit. Instead of using separate calibration circuits for each stage, the invention combines them into one integrated structure that can calibrate stages 132, 142, and 152 simultaneously, reducing overall circuit complexity while maintaining calibration precision.
Solution Approach 2:
The calibration circuit is designed with multi-functionality to handle calibration across multiple stages. The same calibration circuit can operate on different stages by switching between them, making a single circuit perform the work of multiple dedicated circuits, thereby reducing device complexity and manufacturing cost.
2Measurement precision
If conventional offset calibration methods are used to calibrate all stages of the peak detector cell, then measurement precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges the calibration functions for all three stages of the peak detector cell into a single unified calibration circuit. Instead of using separate calibration circuits for each stage, the invention combines them into one integrated structure that can calibrate stages 132, 142, and 152 simultaneously, reducing overall circuit complexity while maintaining calibration precision.
Solution Approach 2:
The calibration circuit uses a replicated structure where the same calibration topology is copied and applied across multiple stages. This allows standardization of the calibration approach, enabling efficient manufacturing through repetition of a proven, optimized circuit block rather than designing and manufacturing three different calibration circuits.
3Ease of manufacture
If PMOS devices are used in the calibration circuit, then ease of manufacture is improved, but reliability deteriorates due to active glitches and inter-symbol interference
Solution Approach 1:
The patent introduces an intermediary calibration mechanism that mediates between the PMOS devices and the problematic signals. The calibration circuit acts as an intermediary that prepares and conditions signals before they reach the PMOS devices, filtering out active glitches and inter-symbol interference that would otherwise cause reliability issues while maintaining the manufacturing advantages of PMOS technology.
Solution Approach 2:
The calibration circuit performs preliminary action by pre-calibrating and conditioning signals before they are processed by the main PMOS-based peak detector cell. This preliminary calibration removes offset errors and prepares clean, stable signals, preventing reliability issues from occurring during normal operation while allowing the use of easier-to-manufacture PMOS devices.
Data Source
AI summary
A method for offset cancellation in a receiver loss of signal (RxLOS) circuit of a serializer/deserializer (SerDes) receiver device includes receiving a differential input signal via the first stage of a peak detector cell of the RxLOS circuit and shorting the differential output of the first stage via a control switch of the second stage of the RxLOS circuit. The control switch may further transition the RxLOS circuit from normal operating mode to an offset cancellation mode wherein the control switch may manually or automatically short the differential output of the first stage.