SerDes Sampler Calibration Using a Self-Generated Reference Voltage
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Solution Overview
Problem
High-speed data communication interfaces using serializers and deserializers are adversely affected by changes in common-mode voltage, leading to performance issues due to variations in process parameters and temperature, which conventional calibration methods fail to adequately address.
Innovation Solution
A calibration circuit with a replica summing and sampling circuit is used to dynamically control current sources, generating a summer output signal representative of the common-mode voltage, and adjusting current flow based on a calibration signal to maintain optimal performance despite variations in process parameters and temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional calibration methods are used, then device complexity is reduced, but reliability deteriorates due to inability to compensate for common-mode voltage changes
Solution Approach 1:
The patent uses replica summing and sampling circuits that replicate the main signal path circuits. These replica circuits are used to generate calibration signals without requiring complex external calibration equipment. The replica circuits copy the essential functionality of the main circuits, allowing for accurate calibration while keeping the overall system manageable in complexity.
Solution Approach 2:
The calibration system is self-contained, using internally generated calibration signals from the replica circuits rather than requiring external calibration equipment. The calibration signals are generated and applied within the same device, making the system self-sufficient and reducing external dependencies while improving reliability.
2Adaptability or versatility
If dynamic control of current sources is implemented, then adaptability to common-mode voltage changes is improved, but device complexity increases
Solution Approach 1:
The patent dynamically adjusts the current flow in the summing circuit by changing the current magnitude parameter based on the calibration signal. This allows the circuit to adapt to different common-mode voltage conditions by modifying the current parameter, achieving versatility without requiring a complete redesign of the circuit architecture.
Solution Approach 2:
The calibration circuit generates feedback signals based on the common-mode voltage detection, which are then used to adjust the current sources in the summing circuit. This closed-loop feedback mechanism enables automatic adaptation to voltage changes while keeping the control logic integrated and manageable.
3Manufacturing precision
If replica circuits are used for calibration, then manufacturing precision is improved through self-calibration, but device complexity increases
Solution Approach 1:
The replica summing and sampling circuits are designed to closely replicate the main signal path circuits, ensuring that calibration performed on the replica circuits accurately reflects the conditions in the main circuits. This copying approach enables precise self-calibration without requiring external calibration equipment, improving manufacturing precision while keeping the replica circuits relatively simple in structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables reliable operation of high-frequency interfaces by dynamically adjusting current sources to compensate for common-mode voltage changes, improving signal processing and reducing errors in serializer/deserializer circuits.
Implementation Method 1
a second input transistor configured to provide an internal reference voltage at its drain. The drain of the second input transistor may be coupled to a gate of the second input transistor
Data Source
AI summary
A calibration circuit includes a replica summing circuit, a replica sampling circuit and a control circuit. The replica summing circuit is a replica of a sampling circuit in a serializer/deserializer (SerDes) interface and is configured to provide a summer output signal that is representative of a common mode voltage at an input of the SerDes interface. The replica sampling circuit is a replica of a sampling circuit in the SerDes interface. The replica sampling circuit includes a first input transistor having a gate coupled to the summer output signal and a second input transistor configured to provide an internal reference voltage at its drain. The drain of the second input transistor is coupled to a gate of the second input transistor. The control circuit is configured to control current flow in the replica summing circuit in response to a calibration signal output by the replica sampling circuit.