S-Parameter Port Reduction in SERDES Simulation Models

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Solution Overview

Problem

The complexity of S-parameter simulation models, particularly in high-data rate serial data paths, leads to increased simulation time due to a large number of input/output ports, making it computationally burdensome and costly to achieve accurate results.

Innovation Solution

The method involves consolidating ground ports, combining common ports, identifying and referencing a return port, and removing it from the simulation file to reduce the number of ports in the S-parameter simulation file, thereby optimizing the simulation process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If SERDES and S-parameter simulation models are combined to properly simulate high-data rate serial data paths, then simulation accuracy is improved, but the number of I/O ports increases leading to excessive simulation time

Engineering Contradiction:
Improvesimulation accuracyVSAvoidsimulation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent consolidates multiple ground ports into a single ground port and merges common ports (such as power supply ports) into one port. This merging reduces the total number of ports in the simulation model while preserving the electrical characteristics and simulation accuracy of the original multi-port model.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal ground port that serves multiple original ground ports simultaneously. This single ground port handles the reference potential for all differential pairs and signal paths that previously required separate ground ports, reducing port count while maintaining simulation fidelity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the number of I/O ports in the simulation model is increased to accurately represent high-data rate serial paths, then simulation fidelity is improved, but computational complexity and simulation time increase excessively

Engineering Contradiction:
Improvesimulation fidelityVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple ports with identical or equivalent electrical functions into single representative ports. Specifically, multiple ground ports are consolidated into one, and common power supply ports are merged, thereby reducing the port matrix size and computational complexity while preserving simulation reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transforms the simulation model by changing the port configuration parameters. By redefining the ground reference and consolidating common ports, the model parameters are optimized to reduce computational burden while maintaining the accuracy of S-parameter simulations for high-data rate serial paths.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If more computational power is allocated to handle the large number of ports in SERDES simulation models, then simulation speed can be improved, but the cost becomes prohibitive

Engineering Contradiction:
Improvesimulation speedVSAvoidimplementation cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent reduces the port count by merging ground ports and common ports, which directly decreases the size of the mathematical matrices that need to be solved during simulation. This reduction in matrix dimensionality lowers computational requirements and enables faster simulation speeds using standard computational resources, avoiding the need for expensive high-performance computing infrastructure.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7761276B1Apparatus and method for port reduction in simulation files
Publication Date: 2010.07.20 XILINX INC
  • US7761276B1 patent drawing
  • US7761276B1 patent drawing
  • US7761276B1 patent drawing

AI summary

Various port reduction methods are employed to reduce the number of port definitions in a simulation file. A ground port reduction method is first employed to reduce certain power supply reference connections to an absolute ground reference for the circuit model. Next, all commonly defined port definitions are combined into a single port definition. Finally, a current analysis is used to further reduce the number of port definitions in the simulation file by removing the current return ports from the simulation file.