SerDes Interface Multiplexing TDM Signals to Reduce Pin Count

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Solution Overview

Problem

Current multi-service platforms face routing issues due to the excess number of TDM signals exceeding the available pins in connections between TDM bus interfaces and digital network switches, leading to increased PCB layer count and costs.

Innovation Solution

A digital signal interface with a multiplexer and serializer/deserializer (SerDes) transceiver that multiplexes and serializes TDM data signals, reducing the pin count by aggregating data and transmitting it efficiently over a smaller number of pins, using a TSIP aggregation module and SerDes transceiver with 8B/10B coding scheme.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of TDM signals is increased to support more services, then the service capacity is improved, but the number of pins required in the connection exceeds the available pins

Engineering Contradiction:
Improveservice capacityVSAvoidpin count
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent combines multiple TDM data signals into a single multiplexed data stream using a multiplexer, and then serializes this stream using a SerDes transceiver. This merging approach allows multiple service signals to be transmitted through a single high-speed serial link, dramatically reducing the pin count from 30+ parallel pins to just a few serial pins while maintaining full service capacity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces the mechanical/physical parallel pin-based TDM bus interface with an electrical/high-speed serial interface. By substituting the parallel mechanical connection structure with a serial electrical transmission system, the patent achieves the same communication functionality with significantly fewer physical connections.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Ease of operation

If the pin count is increased to accommodate all TDM signals, then the signal routing capability is improved, but the PCB layer count and manufacturing cost increase

Engineering Contradiction:
Improvesignal routing capabilityVSAvoidPCB layer count and cost
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

By merging multiple TDM signals into a single serialized data stream, the patent reduces the number of signal paths required on the PCB from dozens of parallel traces to a single high-speed serial path. This dramatically simplifies the PCB routing requirements, reducing the number of layers needed and lowering manufacturing complexity and cost.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the transmission parameter from parallel low-speed signaling to serial high-speed signaling. This parameter change allows the same amount of data to be transmitted through fewer physical channels, simplifying PCB routing and reducing layer count while maintaining or improving transmission performance.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If parallel unidirectional interfaces are used to connect DSPs, then the data transmission capability is improved, but the number of signals required exceeds available pins

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidnumber of signals
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent merges multiple parallel unidirectional data interfaces into a single bidirectional serial interface using multiplexing and SerDes technology. This consolidation maintains the total data transmission capability while reducing the signal count from approximately 30 separate signals to just a few serialized channels.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal high-speed serial interface that can carry multiple TDM data streams bidirectionally, replacing the need for dedicated unidirectional parallel interfaces for each signal direction. This multi-functional interface handles both data transmission and reception, as well as multiple logical channels, through a single physical connection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10027600B2Time-division multiplexing data aggregation over high speed serializer/deserializer lane
Publication Date: 2018.07.17 SMART EMBEDDED COMPUTING INC
  • US10027600B2 patent drawing
  • US10027600B2 patent drawing
  • US10027600B2 patent drawing

AI summary

A digital signal interface includes a multiplexer coupled to receive a plurality of data signals from at least one of a microprocessor, a microcontroller, or a field-programmable gate array (FPGA), the multiplexer multiplexing the plurality of data signals. The interface further includes a serializer/deserializer (SerDes) transceiver coupled to receive the multiplexed data signals, the SerDes transceiver serializing the multiplexed data signals and transmitting the serialized data signals.